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https://opencores.org/ocsvn/modular_oscilloscope/modular_oscilloscope/trunk
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Rev 15 |
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ACK_I: in std_logic ;
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ACK_I: in std_logic ;
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WE_O: out std_logic
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WE_O: out std_logic
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);
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);
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end component eppwbn;
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end component eppwbn;
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component eppwbn_test_wb_side is
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port(
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RST_I: in std_logic;
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CLK_I: in std_logic;
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DAT_I: in std_logic_vector (7 downto 0);
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DAT_O: out std_logic_vector (7 downto 0);
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ADR_I: in std_logic_vector (7 downto 0);
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CYC_I: in std_logic;
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STB_I: in std_logic;
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ACK_O: out std_logic ;
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WE_I: in std_logic
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);
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end component eppwbn_test_wb_side;
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end package eppwbn_pgk;
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end package eppwbn_pgk;
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