URL
https://opencores.org/ocsvn/mpdma/mpdma/trunk
[/] [mpdma/] [trunk/] [mb-dct/] [mb-dct.c] - Diff between revs 10 and 18
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 10 |
Rev 18 |
Line 93... |
Line 93... |
dct_init_start();
|
dct_init_start();
|
|
|
for (;;) {
|
for (;;) {
|
read_from_fsl(color, XPAR_FSL_FIFO_LINK_0_INPUT_SLOT_ID);
|
read_from_fsl(color, XPAR_FSL_FIFO_LINK_0_INPUT_SLOT_ID);
|
|
|
|
if (color==0xff) {
|
|
write_into_fsl(color, XPAR_FSL_FIFO_LINK_0_OUTPUT_SLOT_ID);
|
|
}
|
|
else {
|
for (i=0; i<64; i++) {
|
for (i=0; i<64; i++) {
|
read_from_fsl(result, XPAR_FSL_FIFO_LINK_0_INPUT_SLOT_ID);
|
read_from_fsl(result, XPAR_FSL_FIFO_LINK_0_INPUT_SLOT_ID);
|
((signed char*)ipixels)[i]=result;
|
((signed char*)ipixels)[i]=result;
|
}
|
}
|
|
|
dct(ipixels, color);
|
dct(ipixels, color);
|
|
|
|
write_into_fsl(color, XPAR_FSL_FIFO_LINK_0_OUTPUT_SLOT_ID);
|
|
|
for (i=0; i<64; i++) {
|
for (i=0; i<64; i++) {
|
write_into_fsl(((short*)dctresult)[i], XPAR_FSL_FIFO_LINK_0_OUTPUT_SLOT_ID);
|
write_into_fsl(((short*)dctresult)[i], XPAR_FSL_FIFO_LINK_0_OUTPUT_SLOT_ID);
|
}
|
}
|
}
|
}
|
|
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.