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It provides a new operation mode called "debug mode".
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It provides a new operation mode called "debug mode".
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When enabled, three additional CSRs are available (section <<_cpu_debug_mode_csrs>>) and also the "return from debug mode"
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When enabled, three additional CSRs are available (section <<_cpu_debug_mode_csrs>>) and also the "return from debug mode"
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instruction `dret` is available when the CPU is "in" debug mode.
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instruction `dret` is available when the CPU is "in" debug mode.
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[IMPORTANT]
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[IMPORTANT]
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The CPU _debug mode_ requires the `Zicsr` CPU extension to be implemented (top generic _CPU_EXTENSION_RISCV_Zicsr_ = true).
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The CPU _debug mode_ requires the `Zicsr` and `Zifencei` CPU extension to be implemented (top generics _CPU_EXTENSION_RISCV_Zicsr_
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and _CPU_EXTENSION_RISCV_Zifencei_ = true).
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The CPU debug mode is entered when one of the following events appear:
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The CPU debug mode is entered when one of the following events appear:
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[start=1]
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[start=1]
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. executing `ebreak` instruction (when `dcsr.ebreakm` is set and in machine mode OR when `dcsr.ebreaku` is set and in user mode)
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. executing `ebreak` instruction (when `dcsr.ebreakm` is set and in machine mode OR when `dcsr.ebreaku` is set and in user mode)
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* if an exception occurs
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* if an exception occurs
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* if the exception was caused by any debug-mode entry action the CPU jumps to the _normal entry point_
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* if the exception was caused by any debug-mode entry action the CPU jumps to the _normal entry point_
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( = _CPU_DEBUG_ADDR_) of the park loop again (for example when executing `ebreak` in debug mode)
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( = _CPU_DEBUG_ADDR_) of the park loop again (for example when executing `ebreak` in debug mode)
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* for all other exception sources the CPU jumps to the _exception entry point_ ( = _CPU_DEBUG_ADDR_ + 4)
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* for all other exception sources the CPU jumps to the _exception entry point_ ( = _CPU_DEBUG_ADDR_ + 4)
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to signal an exception to the DM and restarts the park loop again afterwards
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to signal an exception to the DM and restarts the park loop again afterwards
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* interrupts _including_ non-maskable interrupts are disabled; however, they will be buffered and executed when the CPU has left debug mode
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* interrupts are disabled; however, they will be remain pending and will get executed after the CPU has left debug mode
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* if the DM makes a resume request, the park loop exits and the CPU leaves debug mode (executing `dret`)
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* if the DM makes a resume request, the park loop exits and the CPU leaves debug mode (executing `dret`)
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Debug mode is left either by executing the `dret` instruction footnote:[`dret` should only be executed _inside_ the debugger
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Debug mode is left either by executing the `dret` instruction footnote:[`dret` should only be executed _inside_ the debugger
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"park loop" code (-> code ROM in the debug module (DM).)] (_in_ debug mode) or by performing
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"park loop" code (-> code ROM in the debug module (DM).)] (_in_ debug mode) or by performing
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a hardware reset of the CPU. Executing `dret` outside of debug mode will raise an illegal instruction exception.
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a hardware reset of the CPU. Executing `dret` outside of debug mode will raise an illegal instruction exception.
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| 13 | [line-through]#`ebereaks`# | r/- | `0` - supervisor mode not supported
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| 13 | [line-through]#`ebereaks`# | r/- | `0` - supervisor mode not supported
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| 12 | `ebereaku` | r/w | `ebreak` instructions in `user` mode will _enter_ debug mode when set
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| 12 | `ebereaku` | r/w | `ebreak` instructions in `user` mode will _enter_ debug mode when set
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| 11 | [line-through]#`stepie`# | r/- | `0` - IRQs are disabled during single-stepping
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| 11 | [line-through]#`stepie`# | r/- | `0` - IRQs are disabled during single-stepping
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| 10 | [line-through]#`stopcount`# | r/- | `0` - counters increment as usual
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| 10 | [line-through]#`stopcount`# | r/- | `0` - counters increment as usual
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| 9 | [line-through]#`stoptime`# | r/- | `0` - timers increment as usual
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| 9 | [line-through]#`stoptime`# | r/- | `0` - timers increment as usual
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| 8:6 | `cause` | r/- | cause identifier - why was debug mode entered
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| 8:6 | `cause` | r/- | cause identifier - why debug mode was entered
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| 5 | - | r/- | _reserved_, read as zero
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| 5 | - | r/- | _reserved_, read as zero
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| 4 | `mprven` | r/- | `0` - `mstatus.mprv` is ignored when in debug mode
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| 4 | [line-through]#`mprven`# | r/- | `0` - `mstatus.mprv` is ignored when in debug mode
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| 3 | `nmip` | r/- | set when the non-maskable CPU/processor interrupt is pending
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| 3 | [line-through]#`nmip`# | r/- | `0` - non-maskable interrupt is pending
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| 2 | `step` | r/w | enable single-stepping when set
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| 2 | `step` | r/w | enable single-stepping when set
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| 1:0 | `prv` | r/w | CPU privilege level before/after debug mode
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| 1:0 | `prv` | r/w | CPU privilege level before/after debug mode
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|=======================
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|=======================
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