| Line 224... |
Line 224... |
├neorv32_cfs.vhd - Custom functions subsystem
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├neorv32_cfs.vhd - Custom functions subsystem
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├neorv32_debug_dm.vhd - on-chip debugger: debug module
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├neorv32_debug_dm.vhd - on-chip debugger: debug module
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├neorv32_debug_dtm.vhd - on-chip debugger: debug transfer module
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├neorv32_debug_dtm.vhd - on-chip debugger: debug transfer module
|
├neorv32_dmem.entity.vhd - Processor-internal data memory (entity-only!)
|
├neorv32_dmem.entity.vhd - Processor-internal data memory (entity-only!)
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├neorv32_gpio.vhd - General purpose input/output port unit
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├neorv32_gpio.vhd - General purpose input/output port unit
|
|
├neorv32_gptmr.vhd - General purpose 32-bit timer
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├neorv32_icache.vhd - Processor-internal instruction cache
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├neorv32_icache.vhd - Processor-internal instruction cache
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├neorv32_imem.entity.vhd - Processor-internal instruction memory (entity-only!)
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├neorv32_imem.entity.vhd - Processor-internal instruction memory (entity-only!)
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│└neor32_application_image.vhd - IMEM application initialization image
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│└neor32_application_image.vhd - IMEM application initialization image
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├neorv32_mtime.vhd - Machine system timer
|
├neorv32_mtime.vhd - Machine system timer
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├neorv32_neoled.vhd - NeoPixel (TM) compatible smart LED interface
|
├neorv32_neoled.vhd - NeoPixel (TM) compatible smart LED interface
|
├neorv32_pwm.vhd - Pulse-width modulation controller
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├neorv32_pwm.vhd - Pulse-width modulation controller
|
|
├neorv32_slink.vhd - Stream link controller
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├neorv32_spi.vhd - Serial peripheral interface controller
|
├neorv32_spi.vhd - Serial peripheral interface controller
|
├neorv32_sysinfo.vhd - System configuration information memory
|
├neorv32_sysinfo.vhd - System configuration information memory
|
├neorv32_trng.vhd - True random number generator
|
├neorv32_trng.vhd - True random number generator
|
├neorv32_twi.vhd - Two wire serial interface controller
|
├neorv32_twi.vhd - Two wire serial interface controller
|
├neorv32_uart.vhd - Universal async. receiver/transmitter
|
├neorv32_uart.vhd - Universal async. receiver/transmitter
|
├neorv32_wdt.vhd - Watchdog timer
|
├neorv32_wdt.vhd - Watchdog timer
|
├neorv32_wishbone.vhd - External (Wishbone) bus interface
|
├neorv32_wishbone.vhd - External (Wishbone) bus interface
|
|
├neorv32_xirq.vhd - External interrupt controller
|
│
|
│
|
├mem/neorv32_dmem.default.vhd - _Default_ data memory (architecture-only!)
|
├mem/neorv32_dmem.default.vhd - _Default_ data memory (architecture-only!)
|
└mem/neorv32_imem.default.vhd - _Default_ instruction memory (architecture-only!)
|
└mem/neorv32_imem.default.vhd - _Default_ instruction memory (architecture-only!)
|
...................................
|
...................................
|
|
|
| Line 330... |
Line 333... |
| TWI | Two-wire interface | 77 | 43 | 0 | 0
|
| TWI | Two-wire interface | 77 | 43 | 0 | 0
|
| UART0/1 | Universal asynchronous receiver/transmitter 0/1 | 183 | 132 | 0 | 0
|
| UART0/1 | Universal asynchronous receiver/transmitter 0/1 | 183 | 132 | 0 | 0
|
| WDT | Watchdog timer | 53 | 43 | 0 | 0
|
| WDT | Watchdog timer | 53 | 43 | 0 | 0
|
| WISHBONE | External memory interface | 114 | 110 | 0 | 0
|
| WISHBONE | External memory interface | 114 | 110 | 0 | 0
|
| XIRQ | External interrupt controller (32 channels) | 241 | 201 | 0 | 0
|
| XIRQ | External interrupt controller (32 channels) | 241 | 201 | 0 | 0
|
|
| GPTMR | General Purpose Timer | 153 | 107 | 0 | 0
|
|=======================
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|=======================
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:sectnums:
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:sectnums:
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