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[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_cfs.adoc] - Diff between revs 65 and 69

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`CFS Interrupt`	`CFS Interrupt`

`The CFS provides a single high-level-triggered interrupt request signal mapped to the CPU's fast interrupt channel 1.`	`The CFS provides a single rising-edge-triggered interrupt request signal mapped to the CPU's fast interrupt channel 1.`
`Once set, the interrupt has to stay asserted until explicitly acknowledged by the software (for example by`	Once triggered, the interrupt becomes pending (if enabled in the `mis` CSR) and has to be explicitly cleared again by setting
`writing to a specific CFS register). See section <<_processor_interrupts>> for more information.`	the according `mip` CSR bit. See section <<_processor_interrupts>> for more information.


`CFS Configuration Generic`	`CFS Configuration Generic`

By default, the CFS provides a single 32-bit `std_(u)logic_vector` configuration generic _IO_CFS_CONFIG_	By default, the CFS provides a single 32-bit `std_(u)logic_vector` configuration generic _IO_CFS_CONFIG_