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| Configuration generics: | _MEM_INT_DMEM_EN_ | implement processor-internal DMEM when _true_
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| Configuration generics: | _MEM_INT_DMEM_EN_ | implement processor-internal DMEM when _true_
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| | _MEM_INT_DMEM_SIZE_ | DMEM size in bytes
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| | _MEM_INT_DMEM_SIZE_ | DMEM size in bytes
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| CPU interrupts: | none |
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| CPU interrupts: | none |
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|=======================
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|=======================
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Implementation of the processor-internal data memory is enabled via the processor's _MEM_INT_DMEM_EN_
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generic. The size in bytes is defined via the _MEM_INT_DMEM_SIZE_ generic. If the DMEM is implemented,
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the memory is mapped into the data memory space and located right at the beginning of the data memory
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space (default `dspace_base_c` = 0x80000000). The DMEM is always implemented as true RAM.
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[NOTE]
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[NOTE]
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The actual DMEM is split into two design files: a plain entity definition (`neorv32_dmem.entity.vhd`) and the actual
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The actual DMEM is split into two design files: a plain entity definition (`neorv32_dmem.entity.vhd`) and the actual
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architecture definition (`mem/neorv32_dmem.default.vhd`). This **default architecture** provides a _generic_ and
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architecture definition (`mem/neorv32_dmem.default.vhd`). This **default architecture** provides a _generic_ and
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_platform independent_ memory design that (should) infers embedded memory block. You can replace/modify the architecture
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_platform independent_ memory design that (should) infers embedded memory block. You can replace/modify the architecture
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source file in order to use platform-specific features (like advanced memory resources) or to improve technology mapping
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source file in order to use platform-specific features (like advanced memory resources) or to improve technology mapping
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and/or timing.
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and/or timing.
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Implementation of the processor-internal data memory is enabled via the processor's _MEM_INT_DMEM_EN_
|
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generic. The size in bytes is defined via the _MEM_INT_DMEM_SIZE_ generic. If the DMEM is implemented,
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the memory is mapped into the data memory space and located right at the beginning of the data memory
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space (default `dspace_base_c` = 0x80000000). The DMEM is always implemented as RAM.
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