URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_icache.adoc] - Diff between revs 70 and 71

Rev 70	Rev 71
Line 46...	Line 46...
`.Manual Cache Clear/Reload`	`.Manual Cache Clear/Reload`
`[NOTE]`	`[NOTE]`
By executing the `ifence.i` instruction (`Zifencei` CPU extension) the cache is cleared and a reload from	By executing the `ifence.i` instruction (`Zifencei` CPU extension) the cache is cleared and a reload from
`main memory is triggered. Among other things this allows to implement self-modifying code.`	`main memory is triggered. Among other things this allows to implement self-modifying code.`

	`.Retrieve Cache Configuration from Software`
	`[TIP]`
	`Software can retrieve the cache configuration from the <<_sysinfo_cache_configuration>> register.`


`Bus Access Fault Handling`	`Bus Access Fault Handling`

`The cache always loads a complete cache block (_ICACHE_BLOCK_SIZE_ bytes) aligned to it's size every time a`	`The cache always loads a complete cache block (_ICACHE_BLOCK_SIZE_ bytes) aligned to it's size every time a`
`cache miss is detected. If any of the accessed addresses within a single block do not successfully`	`cache miss is detected. If any of the accessed addresses within a single block do not successfully`
`acknowledge the transfer (i.e. issuing an error signal or timing out) the whole cache block is invalidated and`	`acknowledge the transfer (i.e. issuing an error signal or timing out) the whole cache block is invalidated and`