Line 6... |
Line 6... |
[frame="topbot",grid="none"]
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[frame="topbot",grid="none"]
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|=======================
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|=======================
|
| Hardware source file(s): | neorv32_neoled.vhd |
|
| Hardware source file(s): | neorv32_neoled.vhd |
|
| Software driver file(s): | neorv32_neoled.c |
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| Software driver file(s): | neorv32_neoled.c |
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| | neorv32_neoled.h |
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| | neorv32_neoled.h |
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| Top entity port: | `neoled_o` | 1-bit serial data
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| Top entity port: | `neoled_o` | 1-bit serial data output
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| Configuration generics: | _IO_NEOLED_EN_ | implement NEOLED when _true_
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| Configuration generics: | _IO_NEOLED_EN_ | implement NEOLED when _true_
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| | _IO_NEOLED_TX_FIFO_ | TX FIFO depth (1..32k, has to be a power of two)
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| CPU interrupts: | fast IRQ channel 9 | NEOLED interrupt (see <<_processor_interrupts>>)
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| CPU interrupts: | fast IRQ channel 9 | NEOLED interrupt (see <<_processor_interrupts>>)
|
|=======================
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|=======================
|
|
|
**Theory of Operation**
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**Theory of Operation**
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Line 23... |
Line 24... |
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[NOTE]
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[NOTE]
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The NEOLED interface is compatible to the "Adafruit Industries NeoPixel" products, which feature
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The NEOLED interface is compatible to the "Adafruit Industries NeoPixel" products, which feature
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WS2812 (or older WS2811) smart LEDs (see link:https://learn.adafruit.com/adafruit-neopixel-uberguide).
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WS2812 (or older WS2811) smart LEDs (see link:https://learn.adafruit.com/adafruit-neopixel-uberguide).
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The interface provides a single 1-bit output `neoled_o` to drive an arbitrary number of LEDs. Since the
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The interface provides a single 1-bit output `neoled_o` to drive an arbitrary number of cascaded LEDs. Since the
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NEOLED module provides 24-bit and 32-bit operating modes, a mixed setup with RGB LEDs (24-bit color)
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NEOLED module provides 24-bit and 32-bit operating modes, a mixed setup with RGB LEDs (24-bit color)
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and RGBW LEDs (32-bit color including a dedicated white LED chip) is also possible.
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and RGBW LEDs (32-bit color including a dedicated white LED chip) is possible.
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**Theory of Operation – NEOLED Module**
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The NEOLED modules provides two accessible interface registers: the control register _NEOLED_CT_ and the
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TX data register _NEOLED_DATA_. The NEOLED module is globally enabled via the control register's
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_NEOLED_CT_EN_ bit. Clearing this bit will terminate any current operation, clear the TX buffer, reset the module
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and set the `neoled_o` output to zero. The precise timing (implementing the **WS2812** protocol) and transmission
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mode are fully programmable via the _NEOLED_CT_ register to provide maximum flexibility.
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**RGB / RGBW Configuration**
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NeoPixel are available in two "color" version: LEDs with three chips providing RGB color and LEDs with
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four chips providing RGB color plus a dedicated white LED chip (= RGBW). Since the intensity of every
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LED chip is defined via an 8-bit value the RGB LEDs require a frame of 24-bit per module and the RGBW
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LEDs require a frame of 32-bit per module.
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The data transfer quantity of the NEOLED module can be configured via the _NEOLED_MODE_EN_ control
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register bit. If this bit is cleared, the NEOLED interface operates in 24-bit mode and will transmit bits `23:0` of
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the data written to _NEOLED_DATA_ to the LEDs. If _NEOLED_MODE_EN_ is set, the NEOLED interface operates in 32-bit
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mode and will transmit bits `31:0` of the data written to _NEOLED_DATA_ to the LEDs.
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The mode bit can be configured before writing each new data word in order to support
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an arbitrary setup of RGB and RGBW LEDs.
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**Theory of Operation – Protocol**
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**Theory of Operation – Protocol**
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The interface of the WS2812 LEDs uses an 800kHz carrier signal. Data is transmitted in a serial manner
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The interface of the WS2812 LEDs uses an 800kHz carrier signal. Data is transmitted in a serial manner
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starting with LSB-first. The intensity for each R, G & B LED chip (= color code) is defined via an 8-bit
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starting with LSB-first. The intensity for each R, G & B (& W) LED chip (= color code) is defined via an 8-bit
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value. The actual data bits are transferred by modifying the duty cycle of the signal (the timings for the
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value. The actual data bits are transferred by modifying the duty cycle of the signal (the timings for the
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WS2812 are shown below). A RESET command is "send" by pulling the data line LOW for at least 50μs.
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WS2812 are shown below). A RESET command is "send" by pulling the data line LOW for at least 50μs.
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.WS2812 bit-level protocol - taken from the "Adafruit NeoPixel Überguide"
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.WS2812 bit-level protocol - taken from the "Adafruit NeoPixel Überguide"
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image::neopixel.png[align=center]
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image::neopixel.png[align=center]
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Line 49... |
Line 75... |
| T~1H~ | 0.85μs +/- 150ns | high-time for sending a `0`
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| T~1H~ | 0.85μs +/- 150ns | high-time for sending a `0`
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| T~1L~ | 0.45μs +/- 150 ns | low-time for sending a `0`
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| T~1L~ | 0.45μs +/- 150 ns | low-time for sending a `0`
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| RESET | Above 50μs | low-time for sending a RESET command
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| RESET | Above 50μs | low-time for sending a RESET command
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|=======================
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|=======================
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|
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**Theory of Operation – NEOLED Module**
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The NEOLED modules provides two accessible interface register: the control register _NEOLED_CT_ and the
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TX data register _NEOLED_DATA_. The NEOLED module is globally enabled via the control register's
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_NEOLED_CT_EN_ bit. Clearing this bit will terminate any current operation, reset the module and
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set the `neoled_o` output to zero. The precise timing (implementing the **WS2812** protocol) and transmission
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mode are fully programmable via the _NEOLED_CT_ register to provide maximum flexibility.
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**Timing Configuration**
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**Timing Configuration**
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The basic carrier frequency (800kHz for the WS2812 LEDs) is configured via a 3-bit main clock prescaler (_NEOLED_CT_PRSCx_, see table below)
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The basic carrier frequency (800kHz for the WS2812 LEDs) is configured via a 3-bit main clock prescaler (_NEOLED_CT_PRSCx_, see table below)
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that scales the main processor clock f~main~ and a 5-bit cycle multiplier _NEOLED_CT_T_TOT_x_.
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that scales the main processor clock f~main~ and a 5-bit cycle multiplier _NEOLED_CT_T_TOT_x_.
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Line 75... |
Line 94... |
The duty-cycles (or more precisely: the high- and low-times for sending either a '1' bit or a '0' bit) are
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The duty-cycles (or more precisely: the high- and low-times for sending either a '1' bit or a '0' bit) are
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defined via the 5-bit _NEOLED_CT_T_ONE_H_x_ and _NEOLED_CT_T_ZERO_H_x_ values, respecively. These programmable
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defined via the 5-bit _NEOLED_CT_T_ONE_H_x_ and _NEOLED_CT_T_ZERO_H_x_ values, respecively. These programmable
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timing constants allow to adapt the interface for a wide variety of smart LED protocol (for example WS2812 vs.
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timing constants allow to adapt the interface for a wide variety of smart LED protocol (for example WS2812 vs.
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WS2811).
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WS2811).
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**Timing Configuration – Example (WS2812)**
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**Timing Configuration – Example (WS2812)**
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Generate the base clock f~TX~ for the NEOLED TX engine:
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Generate the base clock f~TX~ for the NEOLED TX engine:
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* processor clock f~main~ = 100 MHz
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* processor clock f~main~ = 100 MHz
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Line 101... |
Line 121... |
_**T~1H~**_ = _**T~TX~**_ * _NEOLED_CT_T_ONE_H_ = 40ns * 20 = 0.8µs
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_**T~1H~**_ = _**T~TX~**_ * _NEOLED_CT_T_ONE_H_ = 40ns * 20 = 0.8µs
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[TIP]
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[TIP]
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The NEOLED SW driver library (`neorv32_neoled.h`) provides a simplified configuration
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The NEOLED SW driver library (`neorv32_neoled.h`) provides a simplified configuration
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function that configures all timing parameters for driving WS2812 LEDs based on the processor
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function that configures all timing parameters for driving WS2812 LEDs based on the processor
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clock configuration.
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clock frequency.
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**RGB / RGBW Configuration**
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NeoPixel are available in two "color" version: LEDs with three chips providing RGB color and LEDs with
|
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four chips providing RGB color plus a dedicated white LED chip (= RGBW). Since the intensity of every
|
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LED chip is defined via an 8-bit value the RGB LEDs require a frame of 24-bit per module and the RGBW
|
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LEDs require a frame of 32-bit per module.
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The data transfer quantity of the NEOLED module can be configured via the _NEOLED_MODE_EN_ control
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register bit. If this bit is cleared, the NEOLED interface operates in 24-bit mode and will transmit bits `23:0` of
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the data written to _NEOLED_DATA_. If _NEOLED_MODE_EN_ is set, the NEOLED interface operates in 32-bit
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mode and will transmit bits `31:0` of the data written to _NEOLED_DATA_.
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**TX Data FIFO**
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**TX Data FIFO**
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The interface features a TX data buffer (a FIFO) to allow CPU-independent operation. The buffer depth
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The interface features a TX data buffer (a FIFO) to allow more CPU-independent operation. The buffer depth
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is configured via the `tx_buffer_entries_c` constant (default = 4 entries) in the module's VHDL source
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is configured via the _IO_NEOLED_TX_FIFO_ top generic (default = 1 entry).
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file `rtl/core/neorv32_neoled.vhd`. The current configuration can be read via the _NEOLED_CT_BUFS_x_
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The FIFO size configuration can be read via the _NEOLED_CT_BUFS_x_
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control register bits, which result log2(`tx_buffer_entries_c`).
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control register bits, which result log2(_IO_NEOLED_TX_FIFO_).
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When writing data to the _NEOLED_DATA_ register the data is automatically written to the TX buffer. Whenever
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When writing data to the _NEOLED_DATA_ register the data is automatically written to the TX buffer. Whenever
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data is available in the buffer the serial transmission engine will take it and transmit it to the LEDs.
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data is available in the buffer the serial transmission engine will take it and transmit it to the LEDs.
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The data transfer size (_NEOLED_MODE_EN_) can be modified at every time since this control register bit is also buffered
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The data transfer size (_NEOLED_MODE_EN_) can be modified at every time since this control register bit is also buffered
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in the FIFO. This allows to arbitrarily mixing RGB and RGBW LEDs in the chain.
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in the FIFO. This allows to arbitrarily mixing RGB and RGBW LEDs in the chain.
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Software can check the FIFO fill level via the control register's _NEOLED_CT_TX_EMPTY_, _NEOLED_CT_TX_HALF_
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and _NEOLED_CT_TX_FULL_ flags. The _NEOLED_CT_TX_BUSY_ flags provides additional information if the the TX unit is
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still busy sending data.
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[WARNING]
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[WARNING]
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Please note that the timing configurations (_NEOLED_CT_PRSCx_, _NEOLED_CT_T_TOT_x_,
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Please note that the timing configurations (_NEOLED_CT_PRSCx_, _NEOLED_CT_T_TOT_x_,
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_NEOLED_CT_T_ONE_H_x_ and _NEOLED_CT_T_ZERO_H_x_) are NOT stored to the buffer. Changing
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_NEOLED_CT_T_ONE_H_x_ and _NEOLED_CT_T_ZERO_H_x_) are **NOT** stored to the buffer. Changing
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these value while the buffer is not empty or the TX engine is still sending will cause data corruption.
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these value while the buffer is not empty or the TX engine is still busy will cause data corruption.
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**Status Configuration**
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The NEOLED modules features two read-only status bits in the control register: _NEOLED_CT_BUSY_ and
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** Strobe Command ("RESET") **
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_NEOLED_CT_TX_STATUS_.
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If the _NEOLED_CT_TX_STATUS_ is set the serial TX engine is still busy sending serial data to the LED stripes.
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According to the WS2812 specs the data written to the LED's shift registers is strobed to the actual PWM driver
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If the flag is cleared, the TX engine is idle and the serial data output `neoled_o` is set LOW.
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registers when the data line is low for 50μs ("RESET" command, see table above). This can be implemented
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using busy-wait for at least 50μs. Obviously, this concept wastes a lot of processing power.
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The _NEOLED_CT_BUSY_ flag provides a programmable option to check for the TX buffer state. The control
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To circumvent this, the NEOLED module provides an option to automatically issue an idle time for creating the RESET
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register's _NEOLED_CT_BSCON_ bit is used to configure the "meaning" of the _NEOLED_CT_BUSY_ flag. The
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command. If the _NEOLED_CT_STROBE_ control register bit is set, _all_ data written to the data FIFO (via _NEOLED_DATA_,
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condition for sending an interrupt request (IRQ) to the CPU is also configured via the _NEOLED_CT_BSCON_
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the actually written data is irrelevant) will trigger an idle phase (`neoled_o` = zero) of 127 periods (= _**T~carrier~**_).
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bit.
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This idle time will cause the LEDs to strobe the color data into the PWM driver registers.
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[cols="^5,^8,^8"]
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Since the _NEOLED_CT_STROBE_ flag is also buffered in the TX buffer, the RESET command is treated as just another
|
[options="header",grid="all"]
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data word being written to the TX buffer making busy wait concepts obsolete and allowing maximum refresh rates.
|
|=======================
|
|
| _NEOLED_CT_BSCON_ | _NEOLED_CT_BUSY_ | Sending an IRQ when ...
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| 0 | the busy flag will clear if there **IS at least one free entry** in the TX buffer | the IRQ will fire if **at least one entry GETS free** in the TX buffer
|
**Interrupt**
|
| 1 | the busy flag will clear if the **whole TX buffer IS empty** | the IRQ will fire if the **whole TX buffer GETS empty**
|
|
|=======================
|
The NEOLED modules features a single interrupt that is triggered whenever the TX FIFO's fill level
|
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falls below _half-full_ level. In this case software can write up to _IO_NEOLED_TX_FIFO_/2 new data
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words to _NEOLED_DATA_ without checking the FIFO status flags.
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This highly relaxes time constraints for sending a continuous data stream to the LEDs
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(as an idle time beyond 50μs will trigger the LED's a RESET command).
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When _NEOLED_CT_BSCON_ is set, the CPU can write up to `tx_buffer_entries_c` of new data words to
|
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_NEOLED_DATA_ without checking the busy flag _NEOLED_CT_BUSY_. This highly relaxes time constraints for
|
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sending a continuous data stream to the LEDs (as an idle time beyond 50μs will trigger the LED's a RESET
|
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command).
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.NEOLED register map
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.NEOLED register map
|
[cols="<4,<5,<9,^2,<9"]
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[cols="<4,<5,<9,^2,<9"]
|
[options="header",grid="all"]
|
[options="header",grid="all"]
|
|=======================
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|=======================
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| Address | Name [C] | Bit(s), Name [C] | R/W | Function
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| Address | Name [C] | Bit(s), Name [C] | R/W | Function
|
.22+<| `0xffffffd8` .22+<| _NEOLED_CT_ <|`0` _NEOLED_CT_EN_ ^| r/w <| NEOLED enable
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.25+<| `0xffffffd8` .25+<| _NEOLED_CT_ <|`0` _NEOLED_CT_EN_ ^| r/w <| NEOLED enable
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<|`1` _NEOLED_CT_MODE_ ^| r/w <| data transfer size; `0`=24-bit; `1`=32-bit
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<|`1` _NEOLED_CT_MODE_ ^| r/w <| data transfer size; `0`=24-bit; `1`=32-bit
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<|`2` _NEOLED_CT_BSCON_ ^| r/w <| busy flag / IRQ trigger configuration (see table above)
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<|`2` _NEOLED_CT_STROBE_ ^| r/w <| `0`=send normal color data; `1`=send RESET command on data write access
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<|`3` _NEOLED_CT_PRSC0_ ^| r/w <| 3-bit clock prescaler, bit 0
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<|`3` _NEOLED_CT_PRSC0_ ^| r/w <| 3-bit clock prescaler, bit 0
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<|`4` _NEOLED_CT_PRSC1_ ^| r/w <| 3-bit clock prescaler, bit 1
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<|`4` _NEOLED_CT_PRSC1_ ^| r/w <| 3-bit clock prescaler, bit 1
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<|`5` _NEOLED_CT_PRSC2_ ^| r/w <| 3-bit clock prescaler, bit 2
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<|`5` _NEOLED_CT_PRSC2_ ^| r/w <| 3-bit clock prescaler, bit 2
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<|`6` _NEOLED_CT_BUFS0_ ^| r/- .4+<| 4-bit log2(`tx_buffer_entries_c`)
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<|`6` _NEOLED_CT_BUFS0_ ^| r/- .4+<| 4-bit log2(_IO_NEOLED_TX_FIFO_)
|
<|`7` _NEOLED_CT_BUFS1_ ^| r/-
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<|`7` _NEOLED_CT_BUFS1_ ^| r/-
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<|`8` _NEOLED_CT_BUFS2_ ^| r/-
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<|`8` _NEOLED_CT_BUFS2_ ^| r/-
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<|`9` _NEOLED_CT_BUFS3_ ^| r/-
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<|`9` _NEOLED_CT_BUFS3_ ^| r/-
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<|`10` _NEOLED_CT_T_TOT_0_ ^| r/w .5+| 5-bit pulse clock ticks per total single-bit period (T~total~)
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<|`10` _NEOLED_CT_T_TOT_0_ ^| r/w .5+<| 5-bit pulse clock ticks per total single-bit period (T~total~)
|
<|`11` _NEOLED_CT_T_TOT_1_ ^| r/w
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<|`11` _NEOLED_CT_T_TOT_1_ ^| r/w
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<|`12` _NEOLED_CT_T_TOT_2_ ^| r/w
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<|`12` _NEOLED_CT_T_TOT_2_ ^| r/w
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<|`13` _NEOLED_CT_T_TOT_3_ ^| r/w
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<|`13` _NEOLED_CT_T_TOT_3_ ^| r/w
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<|`14` _NEOLED_CT_T_TOT_4_ ^| r/w
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<|`14` _NEOLED_CT_T_TOT_4_ ^| r/w
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<|`20` _NEOLED_CT_ONE_H_0_ ^| r/w .5+<| 5-bit pulse clock ticks per high-time for sending a one-bit (T~H1~)
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<|`20` _NEOLED_CT_ONE_H_0_ ^| r/w .5+<| 5-bit pulse clock ticks per high-time for sending a one-bit (T~H1~)
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<|`21` _NEOLED_CT_ONE_H_1_ ^| r/w
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<|`21` _NEOLED_CT_ONE_H_1_ ^| r/w
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<|`22` _NEOLED_CT_ONE_H_2_ ^| r/w
|
<|`22` _NEOLED_CT_ONE_H_2_ ^| r/w
|
<|`23` _NEOLED_CT_ONE_H_3_ ^| r/w
|
<|`23` _NEOLED_CT_ONE_H_3_ ^| r/w
|
<|`24` _NEOLED_CT_ONE_H_4_ ^| r/w
|
<|`24` _NEOLED_CT_ONE_H_4_ ^| r/w
|
<|`30` _NEOLED_CT_TX_STATUS_ ^| r/- <| transmit engine busy when `1`
|
<|`30` _NEOLED_CT_TX_STATUS_ ^| r/- <| transmit engine busy when `1`
|
<|`31` _NEOLED_CT_BUSY_ ^| r/- <| busy / buffer status flag; configured via _NEOLED_CT_BSCON_ (see table above)
|
<|`31` _NEOLED_CT_TX_EMPTY_ ^| r/- <| TX FIFO is empty
|
|
<|`31` _NEOLED_CT_TX_HALF_ ^| r/- <| TX FIFO is _at least_ half full
|
|
<|`31` _NEOLED_CT_TX_FULL_ ^| r/- <| TX FIFO is full
|
|
<|`31` _NEOLED_CT_TX_BUSY_ ^| r/- <| TX serial engine is busy when set
|
| `0xffffffdc` | _NEOLED_DATA_ <|`31:0` / `23:0` ^| -/w <| TX data (32-/24-bit)
|
| `0xffffffdc` | _NEOLED_DATA_ <|`31:0` / `23:0` ^| -/w <| TX data (32-/24-bit)
|
|=======================
|
|=======================
|