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[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_spi.adoc] - Diff between revs 70 and 73

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Line 113... Line 113...
 
 
**SPI Interrupt**
**SPI Interrupt**
 
 
The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
module completes the current transfer operation, the interrupt is triggered and has to be explicitly cleared again
module completes the current transfer operation, the interrupt is triggered and has to be explicitly cleared again
by setting the according `mip` CSR bit.
by writing zero to the according <<_mip>> CSR bit.
 
 
 
 
.SPI register map (`struct NEORV32_SPI`)
.SPI register map (`struct NEORV32_SPI`)
[cols="<2,<2,<4,^1,<7"]
[cols="<2,<2,<4,^1,<7"]
[options="header",grid="all"]
[options="header",grid="all"]

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