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* The LFSR-based post-processing can be deactivated using the `lfsr_en_c` constant. The polynomial tap
* The LFSR-based post-processing can be deactivated using the `lfsr_en_c` constant. The polynomial tap
mask of the LFSR can be customized using `lfsr_taps_c`.
mask of the LFSR can be customized using `lfsr_taps_c`.
 
 
**Using the TRNG**
**Using the TRNG**
 
 
The TRNG features a single register for status and data access. When the _TRNG_CT_EN_ control register bit is
The TRNG features a single register for status and data access. When the _TRNG_CTRL_EN_ control register (`CTRL`)
set, the TRNG is enabled and starts operation. As soon as the _TRNG_CT_VALID_ bit is set, the currently
bit is set, the TRNG is enabled and starts operation. As soon as the _TRNG_CTRL_VALID_ bit is set, the currently
sampled 8-bit random data byte can be obtained from the lowest 8 bits of the TRNG_CT register
sampled 8-bit random data byte can be obtained from the lowest 8 bits of the `CTRL` register
(_TRNG_CT_DATA_MSB_ : _TRNG_CT_DATA_LSB_). The _TRNG_CT_VALID_ bit is automatically cleared
(_TRNG_CTRL_DATA_MSB_ : _TRNG_CTRL_DATA_LSB_). The _TRNG_CTRL_VALID_ bit is automatically cleared
when reading the control register.
when reading the control register.
 
 
[IMPORTANT]
[IMPORTANT]
The TRNG needs at least 8 clock cycles to generate a new random byte. During this sampling time
The TRNG needs at least 8 clock cycles to generate a new random byte. During this sampling time
the current output random data is kept stable in the output register until a valid sampling of the new byte has
the current output random data is kept stable in the output register until a valid sampling of the new byte has
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quality is highly effected by the actual configuration of the TRNG and the resulting FPGA mapping/routing.
quality is highly effected by the actual configuration of the TRNG and the resulting FPGA mapping/routing.
However, generating larger histograms of the generated random number shows an equal distribution (binary
However, generating larger histograms of the generated random number shows an equal distribution (binary
average of the random numbers = 127). A simple evaluation test/demo program can be found in
average of the random numbers = 127). A simple evaluation test/demo program can be found in
`sw/example/demo_trng`.
`sw/example/demo_trng`.
 
 
.TRNG register map
.TRNG register map (`struct NEORV32_TRNG`)
[cols="<2,<2,<4,^1,<7"]
[cols="<2,<2,<4,^1,<7"]
[options="header",grid="all"]
[options="header",grid="all"]
|=======================
|=======================
| Address | Name [C] | Bit(s), Name [C] | R/W | Function
| Address | Name [C] | Bit(s), Name [C] | R/W | Function
.3+<| `0xffffffb8` .3+<| _TRNG_CT_ <|`7:0` _TRNG_CT_DATA_MSB_ : _TRNG_CT_DATA_MSB_ ^| r/- <| 8-bit random data output
.3+<| `0xffffffb8` .3+<| `NEORV32_TRNG.CTRL` <|`7:0` _TRNG_CTRL_DATA_MSB_ : _TRNG_CTRL_DATA_MSB_ ^| r/- <| 8-bit random data output
                                   <|`30` _TRNG_CT_EN_                             ^| r/w <| TRNG enable
                                             <|`30` _TRNG_CTRL_EN_                             ^| r/w <| TRNG enable
                                   <|`31` _TRNG_CT_VALID_                          ^| r/- <| random data output is valid when set
                                             <|`31` _TRNG_CTRL_VALID_                          ^| r/- <| random data output is valid when set
|=======================
|=======================

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