URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_uart.adoc] - Diff between revs 60 and 62

Rev 60	Rev 62
Line 124...	Line 124...

`If the UART is configured for simulation mode there will be **NO physical UART0 transmissions via`	`If the UART is configured for simulation mode there will be **NO physical UART0 transmissions via`
`uart0_txd_o`** at all. Furthermore, no interrupts (RX done or TX done) will be triggered in any situation.	`uart0_txd_o`** at all. Furthermore, no interrupts (RX done or TX done) will be triggered in any situation.

`[TIP]`	`[TIP]`
`More information regarding the simulation-mode of the UART0 can be found in section <<_simulating_the_processor>>.`	`More information regarding the simulation-mode of the UART0 can be found in the Uer Guide`
	`section https://stnolting.github.io/neorv32/ug/#_simulating_the_processor[Simulating the Processor].`

`.UART0 register map`	`.UART0 register map`
`[cols="<6,<7,<10,^2,<18"]`	`[cols="<6,<7,<10,^2,<18"]`
`[options="header",grid="all"]`	`[options="header",grid="all"]`
`\|=======================`	`\|=======================`