Line 8... |
Line 8... |
| Hardware source file(s): | neorv32_wdt.vhd |
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| Hardware source file(s): | neorv32_wdt.vhd |
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| Software driver file(s): | neorv32_wdt.c |
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| Software driver file(s): | neorv32_wdt.c |
|
| | neorv32_wdt.h |
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| | neorv32_wdt.h |
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| Top entity port: | none |
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| Top entity port: | none |
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| Configuration generics: | _IO_WDT_EN_ | implement GPIO port when _true_
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| Configuration generics: | _IO_WDT_EN_ | implement GPIO port when _true_
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| CPU interrupts: | FIRQ channel 0 | watchdog timer overflow (see <<_processor_interrupts>>)
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| CPU interrupts: | fast IRQ channel 0 | watchdog timer overflow (see <<_processor_interrupts>>)
|
|=======================
|
|=======================
|
|
|
**Theory of Operation**
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**Theory of Operation**
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|
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The watchdog (WDT) provides a last resort for safety-critical applications. The WDT has an internal 20-bit
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The watchdog (WDT) provides a last resort for safety-critical applications. The WDT has an internal 20-bit
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Line 55... |
Line 55... |
.WDT register map
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.WDT register map
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[cols="<2,<2,<4,^1,^2,<4"]
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[cols="<2,<2,<4,^1,^2,<4"]
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[options="header",grid="all"]
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[options="header",grid="all"]
|
|=======================
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|=======================
|
| Address | Name [C] | Bit(s), Name [C] | R/W | Writable if locked | Function
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| Address | Name [C] | Bit(s), Name [C] | R/W | Writable if locked | Function
|
.9+<| `0xffffff8c` .9+<| _WDT_CT_ <|`0` _WDT_CT_EN_ ^| r/w ^| no <| watchdog enable
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.9+<| `0xffffffbc` .9+<| _WDT_CT_ <|`0` _WDT_CT_EN_ ^| r/w ^| no <| watchdog enable
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<|`1` _WDT_CT_CLK_SEL0_ ^| r/w ^| no .3+<| 3-bit clock prescaler select
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<|`1` _WDT_CT_CLK_SEL0_ ^| r/w ^| no .3+<| 3-bit clock prescaler select
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<|`2` _WDT_CT_CLK_SEL1_ ^| r/w ^| no
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<|`2` _WDT_CT_CLK_SEL1_ ^| r/w ^| no
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<|`3` _WDT_CT_CLK_SEL2_ ^| r/w ^| no
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<|`3` _WDT_CT_CLK_SEL2_ ^| r/w ^| no
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<|`4` _WDT_CT_MODE_ ^| r/w ^| no <| overflow action: `1`=reset, `0`=IRQ
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<|`4` _WDT_CT_MODE_ ^| r/w ^| no <| overflow action: `1`=reset, `0`=IRQ
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<|`5` _WDT_CT_RCAUSE_ ^| r/- ^| - <| cause of last system reset: `0`=caused by external reset signal, `1`=caused by watchdog
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<|`5` _WDT_CT_RCAUSE_ ^| r/- ^| - <| cause of last system reset: `0`=caused by external reset signal, `1`=caused by watchdog
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