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:sectnums!:
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=== License
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=== License
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**BSD 3-Clause License**
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**BSD 3-Clause License**
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Copyright (c) 2021, Stephan Nolting. All rights reserved.
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Copyright (c) 2022, Stephan Nolting. All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that
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the following conditions are met:
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the following conditions are met:
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. Redistributions of source code must retain the above copyright notice, this list of conditions and the
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. Redistributions of source code must retain the above copyright notice, this list of conditions and the
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ARISING IN ANY WAY OUT OF
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ARISING IN ANY WAY OUT OF
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==========================
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==========================
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**The NEORV32 RISC-V Processor** +
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**The NEORV32 RISC-V Processor** +
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Copyright (c) 2021, by Dipl.-Ing. Stephan Nolting. All rights reserved. +
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Copyright (c) 2022, by Dipl.-Ing. Stephan Nolting. All rights reserved. +
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HQ: https://github.com/stnolting/neorv32 +
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HQ: https://github.com/stnolting/neorv32 +
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Contact: stnolting@gmail.com +
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Contact: stnolting@gmail.com +
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_made in Hanover, Germany_
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_made in Hanover, Germany_
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==========================
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==========================
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// ####################################################################################################################
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// ####################################################################################################################
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:sectnums!:
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=== Proprietary Notice
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=== Proprietary Notice
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* "ModelSim" is a trademark of Mentor Graphics – A Siemens Business.
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* "ModelSim" is a trademark of Mentor Graphics – A Siemens Business.
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* "Quartus Prime" and "Cyclone" are trademarks of Intel Corporation.
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* "Quartus Prime" and "Cyclone" are trademarks of Intel Corporation.
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* "iCE40", "UltraPlus" and "Radiant" are trademarks of Lattice Semiconductor Corporation.
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* "iCE40", "UltraPlus" and "Radiant" are trademarks of Lattice Semiconductor Corporation.
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* "Windows" is a trademark of Microsoft Corporation.
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* "Windows" is a trademark of Microsoft Corporation.
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* "Tera Term" copyright by T. Teranishi.
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* "Tera Term" copyright by T. Teranishi.
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* Timing diagrams made with WaveDrom Editor.
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* "NeoPixel" is a trademark of Adafruit Industries.
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* "NeoPixel" is a trademark of Adafruit Industries.
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* Documentation made with `asciidoctor`.
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* Images/figures made with _Microsoft Power Point_.
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* Timing diagrams made with _WaveDrom Editor_.
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* Documentation proudly made with `asciidoctor`.
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* All further/unreferenced products belong to their according copyright holders.
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PDF icons from https://www.flaticon.com and made by
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PDF icons from https://www.flaticon.com and made by
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link:https://www.freepik.com[Freepik], link:https://www.flaticon.com/authors/good-ware[Good Ware],
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link:https://www.freepik.com[Freepik], link:https://www.flaticon.com/authors/good-ware[Good Ware],
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link:https://www.flaticon.com/authors/pixel-perfect[Pixel perfect], link:https://www.flaticon.com/authors/vectors-market[Vectors Market]
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link:https://www.flaticon.com/authors/pixel-perfect[Pixel perfect], link:https://www.flaticon.com/authors/vectors-market[Vectors Market]
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=== Citing
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=== Citing
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If you are using the NEORV32 or parts of the project in some kind of publication, please cite it as follows:
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[NOTE]
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This is an open-source project that is free of charge. Use this project in any way you like
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(as long as it complies to the permissive license). Please quote it appropriately. 👍
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.Contributors ❤️
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.Contributors ❤️
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[NOTE]
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[NOTE]
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Please add as many https://github.com/stnolting/neorv32/graphs/contributors[contributors] as possible to the `authors` field. +
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Please add as many https://github.com/stnolting/neorv32/graphs/contributors[contributors] as possible to the `author` field. +
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This project would not be where it is without them.
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This project would not be where it is without them.
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If you are using the NEORV32 or parts of the project in some kind of publication, please cite it as follows:
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.BibTeX
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.BibTeX
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[source]
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[source]
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----
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----
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@misc{nolting20,
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@misc{nolting22,
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author = {Nolting, S. and ...},
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author = {Nolting, S. and ...},
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title = {The NEORV32 RISC-V Processor},
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title = {The NEORV32 RISC-V Processor},
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year = {2020},
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year = {2022},
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publisher = {GitHub},
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publisher = {GitHub},
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journal = {GitHub repository},
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journal = {GitHub repository},
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howpublished = {\url{https://github.com/stnolting/neorv32}}
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howpublished = {\url{https://github.com/stnolting/neorv32}}
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}
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}
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----
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----
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**A big shout-out to the community and all https://github.com/stnolting/neorv32/graphs/contributors[contributors],
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**A big shout-out to the community and all https://github.com/stnolting/neorv32/graphs/contributors[contributors],
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who helped improving this project! ❤️**
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who helped improving this project! ❤️**
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https://riscv.org[RISC-V] - instruction sets want to be free!
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https://riscv.org[RISC-V] - instruction sets want to be free!
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Continuous integration provided by https://github.com/features/actions[GitHub Actions] and powered by https://github.com/ghdl/ghdl[GHDL].
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=== Impressum (Imprint)
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=== Impressum (Imprint)
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See https://github.com/stnolting/neorv32/blob/master/docs/impressum.md[`docs/impressum.md`].
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See https://github.com/stnolting/neorv32/blob/master/docs/impressum.md[`docs/impressum.md`].
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