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. Create a new project with your FPGA EDA tool of choice.
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. Create a new project with your FPGA EDA tool of choice.
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. Add all VHDL files from the project's `rtl/core` folder to your project.
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. Add all VHDL files from the project's `rtl/core` folder to your project.
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.Internal Memories
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.Internal Memories
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[IMPORTANT]
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[IMPORTANT]
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For a _general_ first setup (technology-independent) use the _default_ memory architectures for the internal memories
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For a _general_ first setup (technology-independent) use the `*.default.vhd` memory architectures for the internal memories
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(IMEM and DMEM). These are located in `rtl/core/mem`, so **make sure to add the files from `rtl/core/mem` to your project, too**. +
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(IMEM and DMEM). These are located in `rtl/core/mem` so make sure to add the files to your project, too. +
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+
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+
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If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the
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If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the
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default memory architectures by optimized platform-specific memory architectures. **Example:** The `setups/radiant/UPduino_v3`
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default memory architectures by optimized platform-specific memory architectures. **Example:** The `setups/radiant/UPduino_v3`
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example setup uses optimized memory primitives. Hence, it does not include the default memory architectures from
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example setup uses optimized memory primitives. Hence, it does not include the default memory architectures from
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`rtl/core/mem` as these are replaced by device-specific implementations. However, it still has to include the entity
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`rtl/core/mem` as these are replaced by device-specific implementations. However, it still has to include the entity
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Section <<_installing_an_executable_directly_into_memory>> shows how to
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Section <<_installing_an_executable_directly_into_memory>> shows how to
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run custom programs on your FPGA setup without having a UART.
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run custom programs on your FPGA setup without having a UART.
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[start=1]
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[start=1]
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. Connect the primary UART (UART0) interface of your FPGA board to a serial port of your host computer.
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. Connect the primary UART (UART0) interface of your FPGA board to a serial port of your host computer.
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. Start a terminal program. In this tutorial, I am using TeraTerm for Windows. You can download it fore free
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. Start a terminal program. In this tutorial, I am using TeraTerm for Windows. You can download it for free
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from https://ttssh2.osdn.jp/index.html.en
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from https://ttssh2.osdn.jp/index.html.en . On Linux you could use GTKTerm, which you can get here
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https://github.com/Jeija/gtkterm.git (or install via your package manager).
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[NOTE]
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[NOTE]
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_Any_ terminal program that can connect to a serial port should work. However, make sure the program
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_Any_ terminal program that can connect to a serial port should work. However, make sure the program
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can transfer data in _raw_ byte mode without any protocol overhead around it.
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can transfer data in _raw_ byte mode without any protocol overhead around it.
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