URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [rtl/] [README.md] - Diff between revs 57 and 61

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`## VHDL Source Folders`	`## VHDL Source Folders`

### [`core`](https://github.com/stnolting/neorv32/tree/master/rtl/core)	### [`core`](https://github.com/stnolting/neorv32/tree/master/rtl/core)

`This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor. When creating a new synthesis/simulation project make`	`This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor.`
sure that all `.vhd` files from this folder are added to a new design library* called `neorv32`.	When creating a new synthesis/simulation project make sure that all `*.vhd` files from this folder are added to a
	new design library called `neorv32`.

### [`top_templates`](https://github.com/stnolting/neorv32/tree/master/rtl/top_templates)	### [templates`](https://github.com/stnolting/neorv32/tree/master/rtl/templates)

`Alternative top entities for the NEORV32 Processor. Actually, these alternative top entities are wrappers, which instantiate the real top entity of`	`Alternative top entities / wrappers for the NEORV32 Processor.`
`processor/CPU and provide a different interface.`
`Alternative top entities / wrappers for the NEORV32 Processor.`