URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [rtl/] [README.md] - Diff between revs 63 and 64

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`This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor.`	`This folder contains the core VHDL files for the NEORV32 CPU and the NEORV32 Processor.`
When creating a new synthesis/simulation project make sure that all `*.vhd` files from this folder are added to a	When creating a new synthesis/simulation project make sure that all `*.vhd` files from this folder are added to a
new design library called `neorv32`.	new design library called `neorv32`.

	:warning: The sub-folder [`core/mem`](https://github.com/stnolting/neorv32/tree/master/rtl/core/mem)
	`contains the _platform-agnostic_ VHDL architectures of the processor-internal memories.`
	`You can _replace_ inclusion of these files by platform-optimized memory architectures.`


### [`processor_templates`](https://github.com/stnolting/neorv32/tree/master/rtl/processor_templates`)	### [`processor_templates`](https://github.com/stnolting/neorv32/tree/master/rtl/processor_templates`)

Contains pre-configured "SoC" templates that instantiate the processor's top entity from `core`.	Contains pre-configured "SoC" templates that instantiate the processor's top entity from `core`.
`These templates can be instantiated directly within a FPGA-specific board wrapper.`	`These templates can be instantiated directly within a FPGA-specific board wrapper.`