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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_busswitch.vhd] - Diff between revs 62 and 66
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| Rev 62 |
Rev 66 |
| Line 154... |
Line 154... |
cb_req_buffered <= (cb_rd_req_buf or cb_wr_req_buf) when (PORT_CB_READ_ONLY = false) else cb_rd_req_buf;
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cb_req_buffered <= (cb_rd_req_buf or cb_wr_req_buf) when (PORT_CB_READ_ONLY = false) else cb_rd_req_buf;
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-- Access Arbiter Sync --------------------------------------------------------------------
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-- Access Arbiter Sync --------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- for registers that require a specific reset state --
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arbiter_sync: process(rstn_i, clk_i)
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arbiter_sync: process(rstn_i, clk_i)
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begin
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begin
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if (rstn_i = '0') then
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if (rstn_i = '0') then
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arbiter.state <= IDLE;
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arbiter.state <= IDLE;
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elsif rising_edge(clk_i) then
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elsif rising_edge(clk_i) then
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| Line 175... |
Line 174... |
-- arbiter defaults --
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-- arbiter defaults --
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arbiter.state_nxt <= arbiter.state;
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arbiter.state_nxt <= arbiter.state;
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arbiter.bus_sel <= '0';
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arbiter.bus_sel <= '0';
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arbiter.we_trig <= '0';
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arbiter.we_trig <= '0';
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arbiter.re_trig <= '0';
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arbiter.re_trig <= '0';
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--
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p_bus_src_o <= '0';
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-- state machine --
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-- state machine --
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case arbiter.state is
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case arbiter.state is
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when IDLE => -- Controller a has full bus access
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when IDLE => -- Controller a has full bus access
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