| Line 83... |
Line 83... |
i_bus_re_o : out std_ulogic; -- read enable
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i_bus_re_o : out std_ulogic; -- read enable
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i_bus_cancel_o : out std_ulogic; -- cancel current bus transaction
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i_bus_cancel_o : out std_ulogic; -- cancel current bus transaction
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i_bus_ack_i : in std_ulogic := '0'; -- bus transfer acknowledge
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i_bus_ack_i : in std_ulogic := '0'; -- bus transfer acknowledge
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i_bus_err_i : in std_ulogic := '0'; -- bus transfer error
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i_bus_err_i : in std_ulogic := '0'; -- bus transfer error
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i_bus_fence_o : out std_ulogic; -- executed FENCEI operation
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i_bus_fence_o : out std_ulogic; -- executed FENCEI operation
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i_bus_priv_o : out std_ulogic_vector(1 downto 0); -- privilege level
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-- data bus interface --
|
-- data bus interface --
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d_bus_addr_o : out std_ulogic_vector(data_width_c-1 downto 0); -- bus access address
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d_bus_addr_o : out std_ulogic_vector(data_width_c-1 downto 0); -- bus access address
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d_bus_rdata_i : in std_ulogic_vector(data_width_c-1 downto 0) := (others => '0'); -- bus read data
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d_bus_rdata_i : in std_ulogic_vector(data_width_c-1 downto 0) := (others => '0'); -- bus read data
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d_bus_wdata_o : out std_ulogic_vector(data_width_c-1 downto 0); -- bus write data
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d_bus_wdata_o : out std_ulogic_vector(data_width_c-1 downto 0); -- bus write data
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d_bus_ben_o : out std_ulogic_vector(03 downto 0); -- byte enable
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d_bus_ben_o : out std_ulogic_vector(03 downto 0); -- byte enable
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| Line 94... |
Line 95... |
d_bus_re_o : out std_ulogic; -- read enable
|
d_bus_re_o : out std_ulogic; -- read enable
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d_bus_cancel_o : out std_ulogic; -- cancel current bus transaction
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d_bus_cancel_o : out std_ulogic; -- cancel current bus transaction
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d_bus_ack_i : in std_ulogic := '0'; -- bus transfer acknowledge
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d_bus_ack_i : in std_ulogic := '0'; -- bus transfer acknowledge
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d_bus_err_i : in std_ulogic := '0'; -- bus transfer error
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d_bus_err_i : in std_ulogic := '0'; -- bus transfer error
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d_bus_fence_o : out std_ulogic; -- executed FENCE operation
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d_bus_fence_o : out std_ulogic; -- executed FENCE operation
|
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d_bus_priv_o : out std_ulogic_vector(1 downto 0); -- privilege level
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-- system time input from MTIME --
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-- system time input from MTIME --
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time_i : in std_ulogic_vector(63 downto 0) := (others => '0'); -- current system time
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time_i : in std_ulogic_vector(63 downto 0) := (others => '0'); -- current system time
|
-- interrupts (risc-v compliant) --
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-- interrupts (risc-v compliant) --
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msw_irq_i : in std_ulogic := '0'; -- machine software interrupt
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msw_irq_i : in std_ulogic := '0'; -- machine software interrupt
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mext_irq_i : in std_ulogic := '0'; -- machine external interrupt
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mext_irq_i : in std_ulogic := '0'; -- machine external interrupt
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| Line 367... |
Line 369... |
d_bus_ack_i => d_bus_ack_i, -- bus transfer acknowledge
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d_bus_ack_i => d_bus_ack_i, -- bus transfer acknowledge
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d_bus_err_i => d_bus_err_i, -- bus transfer error
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d_bus_err_i => d_bus_err_i, -- bus transfer error
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d_bus_fence_o => d_bus_fence_o -- fence operation
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d_bus_fence_o => d_bus_fence_o -- fence operation
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);
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);
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|
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-- current privilege level --
|
|
i_bus_priv_o <= priv_mode;
|
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d_bus_priv_o <= priv_mode;
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|
|
|
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end neorv32_cpu_rtl;
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end neorv32_cpu_rtl;
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