assertnot(BUS_TIMEOUT <2)report"NEORV32 CPU CONFIG ERROR! Invalid bus access timeout value <BUS_TIMEOUT>. Has to be >= 2."severityerror;
assertnot(BUS_TIMEOUT <2)report"NEORV32 CPU CONFIG ERROR! Invalid bus access timeout value <BUS_TIMEOUT>. Has to be >= 2."severityerror;
-- Instruction prefetch buffer size --
-- Instruction prefetch buffer size --
assertnot(is_power_of_two_f(ipb_entries_c)= false)report"NEORV32 CPU CONFIG ERROR! Number of entries in instruction prefetch buffer <ipb_entries_c> has to be a power of two."severityerror;
assertnot(is_power_of_two_f(ipb_entries_c)= false)report"NEORV32 CPU CONFIG ERROR! Number of entries in instruction prefetch buffer <ipb_entries_c> has to be a power of two."severityerror;
-- A extension - only lr.w and sc.w supported yet --
-- A extension - only lr.w and sc.w are supported yet --
assertnot(CPU_EXTENSION_RISCV_A = true)report"NEORV32 CPU CONFIG WARNING! Atomic operations extension (A) only supports >lr.w< and >sc.w< instructions yet."severitywarning;
assertnot(CPU_EXTENSION_RISCV_A = true)report"NEORV32 CPU CONFIG WARNING! Atomic operations extension (A) only supports <lr.w> and <sc.w> instructions."severitywarning;
-- Bit manipulation notifier --
-- Bit manipulation notifier --
assertnot(CPU_EXTENSION_RISCV_B = true)report"NEORV32 CPU CONFIG WARNING! Bit manipulation extension (B) only supports 'base' instruction sub-set (Zbb) yet and is still 'unofficial' (not-ratified)."severitywarning;
assertnot(CPU_EXTENSION_RISCV_B = true)report"NEORV32 CPU CONFIG WARNING! Bit manipulation extension (B) only supports 'base' instruction sub-set (Zbb) yet and is still 'unofficial' (not-ratified)."severitywarning;