| Line 90... |
Line 90... |
firq_i : in std_ulogic_vector(3 downto 0);
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firq_i : in std_ulogic_vector(3 downto 0);
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-- system time input from MTIME --
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-- system time input from MTIME --
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time_i : in std_ulogic_vector(63 downto 0); -- current system time
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time_i : in std_ulogic_vector(63 downto 0); -- current system time
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-- physical memory protection --
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-- physical memory protection --
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pmp_addr_o : out pmp_addr_if_t; -- addresses
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pmp_addr_o : out pmp_addr_if_t; -- addresses
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pmp_maddr_i : in pmp_addr_if_t; -- masked addresses
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pmp_ctrl_o : out pmp_ctrl_if_t; -- configs
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pmp_ctrl_o : out pmp_ctrl_if_t; -- configs
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priv_mode_o : out std_ulogic_vector(1 downto 0); -- current CPU privilege level
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priv_mode_o : out std_ulogic_vector(1 downto 0); -- current CPU privilege level
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-- bus access exceptions --
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-- bus access exceptions --
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mar_i : in std_ulogic_vector(data_width_c-1 downto 0); -- memory address register
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mar_i : in std_ulogic_vector(data_width_c-1 downto 0); -- memory address register
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ma_instr_i : in std_ulogic; -- misaligned instruction address
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ma_instr_i : in std_ulogic; -- misaligned instruction address
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| Line 1465... |
Line 1464... |
csr_rdata_o(04) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_E); -- E CPU extension
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csr_rdata_o(04) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_E); -- E CPU extension
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csr_rdata_o(08) <= not bool_to_ulogic_f(CPU_EXTENSION_RISCV_E); -- I CPU extension (if not E)
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csr_rdata_o(08) <= not bool_to_ulogic_f(CPU_EXTENSION_RISCV_E); -- I CPU extension (if not E)
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csr_rdata_o(12) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_M); -- M CPU extension
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csr_rdata_o(12) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_M); -- M CPU extension
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csr_rdata_o(20) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_U); -- U CPU extension
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csr_rdata_o(20) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_U); -- U CPU extension
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csr_rdata_o(23) <= '1'; -- X CPU extension (non-std extensions)
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csr_rdata_o(23) <= '1'; -- X CPU extension (non-std extensions)
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csr_rdata_o(25) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zicsr) and bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zifencei); -- Z CPU extension
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csr_rdata_o(30) <= '1'; -- 32-bit architecture (MXL lo)
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csr_rdata_o(30) <= '1'; -- 32-bit architecture (MXL lo)
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csr_rdata_o(31) <= '0'; -- 32-bit architecture (MXL hi)
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csr_rdata_o(31) <= '0'; -- 32-bit architecture (MXL hi)
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when x"304" => -- R/W: mie - machine interrupt-enable register
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when x"304" => -- R/W: mie - machine interrupt-enable register
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csr_rdata_o(03) <= csr.mie_msie; -- machine software IRQ enable
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csr_rdata_o(03) <= csr.mie_msie; -- machine software IRQ enable
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csr_rdata_o(07) <= csr.mie_mtie; -- machine timer IRQ enable
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csr_rdata_o(07) <= csr.mie_mtie; -- machine timer IRQ enable
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| Line 1533... |
Line 1531... |
end if;
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end if;
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end if;
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end if;
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when x"3b0" => -- R/W: pmpaddr0 - physical memory protection address register 0
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when x"3b0" => -- R/W: pmpaddr0 - physical memory protection address register 0
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 1) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 1) then
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csr_rdata_o <= pmp_maddr_i(0)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(0);
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if (csr.pmpcfg(0)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(0)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b1" => -- R/W: pmpaddr1 - physical memory protection address register 1
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when x"3b1" => -- R/W: pmpaddr1 - physical memory protection address register 1
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 2) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 2) then
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csr_rdata_o <= pmp_maddr_i(1)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(1);
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if (csr.pmpcfg(1)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(1)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b2" => -- R/W: pmpaddr2 - physical memory protection address register 2
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when x"3b2" => -- R/W: pmpaddr2 - physical memory protection address register 2
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 3) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 3) then
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csr_rdata_o <= pmp_maddr_i(2)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(2);
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if (csr.pmpcfg(2)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(2)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b3" => -- R/W: pmpaddr3 - physical memory protection address register 3
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when x"3b3" => -- R/W: pmpaddr3 - physical memory protection address register 3
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 4) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 4) then
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csr_rdata_o <= pmp_maddr_i(3)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(3);
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if (csr.pmpcfg(3)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(3)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b4" => -- R/W: pmpaddr4 - physical memory protection address register 4
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when x"3b4" => -- R/W: pmpaddr4 - physical memory protection address register 4
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 5) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 5) then
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csr_rdata_o <= pmp_maddr_i(4)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(4);
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if (csr.pmpcfg(4)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(4)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b5" => -- R/W: pmpaddr5 - physical memory protection address register 5
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when x"3b5" => -- R/W: pmpaddr5 - physical memory protection address register 5
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 6) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 6) then
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csr_rdata_o <= pmp_maddr_i(5)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(5);
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if (csr.pmpcfg(5)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(5)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b6" => -- R/W: pmpaddr6 - physical memory protection address register 6
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when x"3b6" => -- R/W: pmpaddr6 - physical memory protection address register 6
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 7) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 7) then
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csr_rdata_o <= pmp_maddr_i(6)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(6);
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if (csr.pmpcfg(6)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(6)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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end if;
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end if;
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when x"3b7" => -- R/W: pmpaddr7 - physical memory protection address register 7
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when x"3b7" => -- R/W: pmpaddr7 - physical memory protection address register 7
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 8) then
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if (PMP_USE = true) and (PMP_NUM_REGIONS >= 8) then
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csr_rdata_o <= pmp_maddr_i(7)(33 downto 2);
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csr_rdata_o <= csr.pmpaddr(7);
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if (csr.pmpcfg(7)(4 downto 3) = "00") then -- mode = off
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if (csr.pmpcfg(7)(4 downto 3) = "00") then -- mode = off
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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csr_rdata_o(PMP_GRANULARITY-1 downto 0) <= (others => '0'); -- required for granularity check by SW
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else -- mode = NAPOT
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else -- mode = NAPOT
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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csr_rdata_o(PMP_GRANULARITY-2 downto 0) <= (others => '1');
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end if;
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end if;
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