| Line 382... |
Line 382... |
else -- 16-bit aligned
|
else -- 16-bit aligned
|
fetch_engine.ci_input <= fetch_engine.i_buf2(31 downto 16);
|
fetch_engine.ci_input <= fetch_engine.i_buf2(31 downto 16);
|
|
|
if (ipb.free = '1') then -- free entry in buffer?
|
if (ipb.free = '1') then -- free entry in buffer?
|
ipb.we <= '1';
|
ipb.we <= '1';
|
if (fetch_engine.i_buf2(17 downto 16) = "11") then -- uncompressed
|
if (fetch_engine.i_buf2(17 downto 16) = "11") then -- uncompressed and "unaligned"
|
ipb.wdata <= '0' & fetch_engine.i_buf(33 downto 32) & '0' & fetch_engine.i_buf(15 downto 00) & fetch_engine.i_buf2(31 downto 16);
|
ipb.wdata <= '0' & fetch_engine.i_buf(33 downto 32) & '0' & fetch_engine.i_buf(15 downto 00) & fetch_engine.i_buf2(31 downto 16);
|
fetch_engine.pc_add <= std_ulogic_vector(to_unsigned(4, data_width_c));
|
fetch_engine.pc_add <= std_ulogic_vector(to_unsigned(4, data_width_c));
|
fetch_engine.state_nxt <= IFETCH_0;
|
fetch_engine.state_nxt <= IFETCH_0;
|
else -- compressed
|
else -- compressed
|
ipb.wdata <= ci_illegal & fetch_engine.i_buf(33 downto 32) & '1' & ci_instr32;
|
ipb.wdata <= ci_illegal & fetch_engine.i_buf(33 downto 32) & '1' & ci_instr32;
|
| Line 980... |
Line 980... |
when x"f11" => csr_acc_valid <= is_m_mode_v; -- mvendorid
|
when x"f11" => csr_acc_valid <= is_m_mode_v; -- mvendorid
|
when x"f12" => csr_acc_valid <= is_m_mode_v; -- marchid
|
when x"f12" => csr_acc_valid <= is_m_mode_v; -- marchid
|
when x"f13" => csr_acc_valid <= is_m_mode_v; -- mimpid
|
when x"f13" => csr_acc_valid <= is_m_mode_v; -- mimpid
|
when x"f14" => csr_acc_valid <= is_m_mode_v; -- mhartid
|
when x"f14" => csr_acc_valid <= is_m_mode_v; -- mhartid
|
--
|
--
|
|
when x"fc0" => csr_acc_valid <= is_m_mode_v; -- mzext (custom CSR)
|
|
--
|
when others => csr_acc_valid <= '0'; -- undefined
|
when others => csr_acc_valid <= '0'; -- undefined
|
end case;
|
end case;
|
end process invalid_csr_access_check;
|
end process invalid_csr_access_check;
|
|
|
|
|
| Line 1657... |
Line 1659... |
when x"f13" => -- R/-: mimpid - implementation ID / NEORV32: version
|
when x"f13" => -- R/-: mimpid - implementation ID / NEORV32: version
|
csr_rdata_o <= hw_version_c;
|
csr_rdata_o <= hw_version_c;
|
when x"f14" => -- R/-: mhartid - hardware thread ID
|
when x"f14" => -- R/-: mhartid - hardware thread ID
|
csr_rdata_o <= HW_THREAD_ID;
|
csr_rdata_o <= HW_THREAD_ID;
|
|
|
|
-- custom machine read-only CSRs --
|
|
when x"fc0" => -- R/-: mzext
|
|
csr_rdata_o(0) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zicsr); -- Zicsr CPU extension
|
|
csr_rdata_o(1) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zifencei); -- Zifencei CPU extension
|
|
csr_rdata_o(2) <= bool_to_ulogic_f(CSR_COUNTERS_USE); -- std (performance) counters enabled
|
|
|
-- undefined/unavailable --
|
-- undefined/unavailable --
|
when others =>
|
when others =>
|
csr_rdata_o <= (others => '0'); -- not implemented
|
csr_rdata_o <= (others => '0'); -- not implemented
|
|
|
end case;
|
end case;
|
