Line 17... |
Line 17... |
-- # * Signaling NaNs (sNaN) will not be generated by the hardware at all. However, if inserted by #
|
-- # * Signaling NaNs (sNaN) will not be generated by the hardware at all. However, if inserted by #
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-- # the programmer they are handled correctly. #
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-- # the programmer they are handled correctly. #
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-- # ********************************************************************************************* #
|
-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
|
-- # BSD 3-Clause License #
|
-- # #
|
-- # #
|
-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
|
-- # #
|
-- # #
|
-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
|
-- # permitted provided that the following conditions are met: #
|
-- # permitted provided that the following conditions are met: #
|
-- # #
|
-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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Line 382... |
Line 382... |
ctrl_engine.state <= S_BUSY;
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ctrl_engine.state <= S_BUSY;
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end if;
|
end if;
|
|
|
when S_BUSY => -- operation in progress (multi-cycle)
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when S_BUSY => -- operation in progress (multi-cycle)
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-- -----------------------------------------------------------
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-- -----------------------------------------------------------
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if (fu_core_done = '1') then -- processing done?
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if (fu_core_done = '1') or (ctrl_i(ctrl_trap_c) = '1') then -- processing done? abort if trap
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ctrl_engine.valid <= '1';
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ctrl_engine.valid <= '1';
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ctrl_engine.state <= S_IDLE;
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ctrl_engine.state <= S_IDLE;
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end if;
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end if;
|
|
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when others => -- undefined
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when others => -- undefined
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