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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_cpu_cp_muldiv.vhd] - Diff between revs 45 and 47
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Rev 45 |
Rev 47 |
Line 300... |
Line 300... |
div_res <= div_sign_comp when (div_res_corr = '1') and (opy_is_zero = '0') else div_sign_comp_in;
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div_res <= div_sign_comp when (div_res_corr = '1') and (opy_is_zero = '0') else div_sign_comp_in;
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-- Data Output ----------------------------------------------------------------------------
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-- Data Output ----------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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operation_result: process(valid, cp_op_ff, mul_product, div_res, quotient, opy_is_zero, rs1, remainder)
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operation_result: process(clk_i)
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begin
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begin
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if rising_edge(clk_i) then
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res_o <= (others => '0');
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if (valid = '1') then
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if (valid = '1') then
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case cp_op_ff is
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case cp_op_ff is
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when cp_op_mul_c =>
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when cp_op_mul_c =>
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res_o <= mul_product(31 downto 00);
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res_o <= mul_product(31 downto 00);
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when cp_op_mulh_c | cp_op_mulhsu_c | cp_op_mulhu_c =>
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when cp_op_mulh_c | cp_op_mulhsu_c | cp_op_mulhu_c =>
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Line 321... |
Line 323... |
res_o <= rs1;
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res_o <= rs1;
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end if;
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end if;
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when others => -- cp_op_remu_c
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when others => -- cp_op_remu_c
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res_o <= remainder;
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res_o <= remainder;
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end case;
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end case;
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else
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end if;
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res_o <= (others => '0');
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end if;
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end if;
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end process operation_result;
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end process operation_result;
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-- status output --
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-- status output --
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valid_o <= valid;
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valid_o <= valid;
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