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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_cpu_cp_muldiv.vhd] - Diff between revs 69 and 71
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| Rev 69 |
Rev 71 |
| Line 8... |
Line 8... |
-- # #
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-- # #
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-- # Multiplications can be mapped to DSP blocks (faster!) when FAST_MUL_EN = true. #
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-- # Multiplications can be mapped to DSP blocks (faster!) when FAST_MUL_EN = true. #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
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-- # BSD 3-Clause License #
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-- # #
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-- # #
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-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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-- # #
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-- # #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # permitted provided that the following conditions are met: #
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-- # permitted provided that the following conditions are met: #
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-- # #
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-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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| Line 172... |
Line 172... |
--
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--
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state <= PROCESSING;
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state <= PROCESSING;
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when PROCESSING =>
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when PROCESSING =>
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cnt <= std_ulogic_vector(unsigned(cnt) - 1);
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cnt <= std_ulogic_vector(unsigned(cnt) - 1);
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if (cnt = "00000") then
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if (cnt = "00000") or (ctrl_i(ctrl_trap_c) = '1') then -- abort on trap
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valid_o <= '1';
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valid_o <= '1';
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state <= FINALIZE;
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state <= FINALIZE;
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end if;
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end if;
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when FINALIZE =>
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when FINALIZE =>
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