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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_cpu_decompressor.vhd] - Diff between revs 6 and 36
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| Rev 6 |
Rev 36 |
| Line 114... |
Line 114... |
when "00" => -- C0: Register-Based Loads and Stores
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when "00" => -- C0: Register-Based Loads and Stores
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case ci_instr16_i(ci_funct3_msb_c downto ci_funct3_lsb_c) is
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case ci_instr16_i(ci_funct3_msb_c downto ci_funct3_lsb_c) is
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when "000" => -- Illegal_instruction, C.ADDI4SPN
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when "000" => -- Illegal_instruction, C.ADDI4SPN
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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if (ci_instr16_i(12 downto 2) = "00000000000") then -- "official" illegal instruction
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if (ci_instr16_i(12 downto 2) = "00000000000") then -- "official illegal instruction"
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ci_illegal_o <= '1';
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ci_illegal_o <= '1';
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else
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else -- C.ADDI4SPN
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-- C.ADDI4SPN
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rd_3_msb_c downto ci_rd_3_lsb_c);
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rd_3_msb_c downto ci_rd_3_lsb_c);
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_subadd_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_subadd_c;
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ci_instr32_o(instr_imm12_msb_c downto instr_imm12_lsb_c) <= (others => '0'); -- zero extend
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ci_instr32_o(instr_imm12_msb_c downto instr_imm12_lsb_c) <= (others => '0'); -- zero extend
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