Line 1... |
Line 1... |
-- #################################################################################################
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-- #################################################################################################
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-- # << NEORV32 - CPU: Compressed Instructions Decoder (RISC-V "C" Extension) >> #
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-- # << NEORV32 - CPU: Compressed Instructions Decoder (RISC-V "C" Extension) >> #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
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-- # BSD 3-Clause License #
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-- # #
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-- # #
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-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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-- # #
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-- # #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # permitted provided that the following conditions are met: #
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-- # permitted provided that the following conditions are met: #
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-- # #
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-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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Line 38... |
Line 38... |
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library neorv32;
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library neorv32;
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use neorv32.neorv32_package.all;
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use neorv32.neorv32_package.all;
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entity neorv32_cpu_decompressor is
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entity neorv32_cpu_decompressor is
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generic (
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FPU_ENABLE : boolean -- floating-point instruction enabled
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);
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port (
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port (
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-- instruction input --
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-- instruction input --
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ci_instr16_i : in std_ulogic_vector(15 downto 0); -- compressed instruction input
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ci_instr16_i : in std_ulogic_vector(15 downto 0); -- compressed instruction input
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-- instruction output --
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-- instruction output --
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ci_illegal_o : out std_ulogic; -- is an illegal compressed instruction
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ci_illegal_o : out std_ulogic; -- is an illegal compressed instruction
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Line 131... |
Line 134... |
ci_instr32_o(instr_imm12_lsb_c + 6) <= ci_instr16_i(7);
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ci_instr32_o(instr_imm12_lsb_c + 6) <= ci_instr16_i(7);
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ci_instr32_o(instr_imm12_lsb_c + 7) <= ci_instr16_i(8);
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ci_instr32_o(instr_imm12_lsb_c + 7) <= ci_instr16_i(8);
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ci_instr32_o(instr_imm12_lsb_c + 8) <= ci_instr16_i(9);
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ci_instr32_o(instr_imm12_lsb_c + 8) <= ci_instr16_i(9);
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ci_instr32_o(instr_imm12_lsb_c + 9) <= ci_instr16_i(10);
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ci_instr32_o(instr_imm12_lsb_c + 9) <= ci_instr16_i(10);
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--
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--
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ci_illegal_o <= not or_reduce_f(ci_instr16_i(12 downto 2)); -- 12:2 = "00000000000" is official illegal instruction
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if (ci_instr16_i(12 downto 2) = "00000000000") then -- 12:2 = "00000000000" is official illegal instruction
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ci_illegal_o <= '1';
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end if;
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when "010" | "011" => -- C.LW / C.FLW
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when "010" | "011" => -- C.LW / C.FLW
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_load_c;
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_load_c;
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ci_instr32_o(21 downto 20) <= "00";
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ci_instr32_o(21 downto 20) <= "00";
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Line 146... |
Line 151... |
ci_instr32_o(26) <= ci_instr16_i(5);
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ci_instr32_o(26) <= ci_instr16_i(5);
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ci_instr32_o(31 downto 27) <= (others => '0');
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ci_instr32_o(31 downto 27) <= (others => '0');
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_lw_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_lw_c;
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rd_3_msb_c downto ci_rd_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rd_3_msb_c downto ci_rd_3_lsb_c); -- x8 - x15
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') then -- C.FLW
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') and (FPU_ENABLE = false) then -- C.FLW
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ci_illegal_o <= '1';
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ci_illegal_o <= '1';
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end if;
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end if;
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when "110" | "111" => -- C.SW / C.FSW
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when "110" | "111" => -- C.SW / C.FSW
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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Line 163... |
Line 168... |
ci_instr32_o(26) <= ci_instr16_i(5);
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ci_instr32_o(26) <= ci_instr16_i(5);
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ci_instr32_o(31 downto 27) <= (others => '0');
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ci_instr32_o(31 downto 27) <= (others => '0');
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sw_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sw_c;
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= "01" & ci_instr16_i(ci_rs2_3_msb_c downto ci_rs2_3_lsb_c); -- x8 - x15
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= "01" & ci_instr16_i(ci_rs2_3_msb_c downto ci_rs2_3_lsb_c); -- x8 - x15
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') then -- C.FSW
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') and (FPU_ENABLE = false) then -- C.FSW
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ci_illegal_o <= '1';
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ci_illegal_o <= '1';
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end if;
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end if;
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when others => -- undefined
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when others => -- undefined
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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Line 250... |
Line 255... |
ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 6) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 6) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 7) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 7) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 8) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 8) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 9) <= ci_instr16_i(12);
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ci_instr32_o(instr_imm12_lsb_c + 9) <= ci_instr16_i(12);
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else -- C.LUI
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else -- C.LUI
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_lui_c;
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_lui_c;
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= ci_instr16_i(ci_rd_5_msb_c downto ci_rd_5_lsb_c);
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= ci_instr16_i(ci_rd_5_msb_c downto ci_rd_5_lsb_c);
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ci_instr32_o(instr_imm20_msb_c downto instr_imm20_lsb_c) <= (others => ci_instr16_i(12)); -- sign extend
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ci_instr32_o(instr_imm20_msb_c downto instr_imm20_lsb_c) <= (others => ci_instr16_i(12)); -- sign extend
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ci_instr32_o(instr_imm20_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm20_lsb_c + 0) <= ci_instr16_i(2);
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Line 282... |
Line 286... |
ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(12);
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ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(12);
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when "100" => -- C.SRLI, C.SRAI, C.ANDI, C.SUB, C.XOR, C.OR, C.AND, reserved
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when "100" => -- C.SRLI, C.SRAI, C.ANDI, C.SUB, C.XOR, C.OR, C.AND, reserved
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c);
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c);
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c);
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if (ci_instr16_i(11 downto 10) = "11") then -- register-register operation
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "01" & ci_instr16_i(ci_rs1_3_msb_c downto ci_rs1_3_lsb_c);
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alu_c;
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= "01" & ci_instr16_i(ci_rs2_3_msb_c downto ci_rs2_3_lsb_c);
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= "01" & ci_instr16_i(ci_rs2_3_msb_c downto ci_rs2_3_lsb_c);
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case ci_instr16_i(6 downto 5) is
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when "00" => -- C.SUB
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_subadd_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0100000";
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when "01" => -- C.XOR
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_xor_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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when "10" => -- C.OR
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_or_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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when others => -- C.AND
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_and_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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end case;
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else -- register-immediate operation
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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case ci_instr16_i(11 downto 10) is
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case ci_instr16_i(11 downto 10) is
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when "00" => -- C.SRLI
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when "00" => -- C.SRLI
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sr_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sr_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_illegal_o <= ci_instr16_i(12);
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if (ci_instr16_i(12) = '1') then
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ci_illegal_o <= '1';
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end if;
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when "01" => -- C.SRAI
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when "01" => -- C.SRAI
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sr_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sr_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0100000";
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0100000";
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_illegal_o <= ci_instr16_i(12);
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if (ci_instr16_i(12) = '1') then
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ci_illegal_o <= '1';
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end if;
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when "10" => -- C.ANDI
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when "10" => -- C.ANDI
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ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alui_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_and_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_and_c;
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ci_instr32_o(instr_imm12_msb_c downto instr_imm12_lsb_c) <= (others => ci_instr16_i(12)); -- sign extend
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ci_instr32_o(instr_imm12_msb_c downto instr_imm12_lsb_c) <= (others => ci_instr16_i(12)); -- sign extend
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
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ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(12);
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ci_instr32_o(instr_imm12_lsb_c + 5) <= ci_instr16_i(12);
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when others => -- register-register operation
|
when others => -- "11" = register-register operation
|
NULL;
|
ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_alu_c;
|
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case ci_instr16_i(6 downto 5) is
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when "00" => -- C.SUB
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_subadd_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0100000";
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when "01" => -- C.XOR
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_xor_c;
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
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when "10" => -- C.OR
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_or_c;
|
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ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
|
|
when others => -- C.AND
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|
ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_and_c;
|
|
ci_instr32_o(instr_funct7_msb_c downto instr_funct7_lsb_c) <= "0000000";
|
|
end case;
|
end case;
|
end case;
|
end if;
|
|
if (ci_instr16_i(12 downto 10) = "111") then -- reserved / undefined
|
|
ci_illegal_o <= '1';
|
|
end if;
|
|
|
|
when others => -- undefined
|
when others => -- undefined
|
-- ----------------------------------------------------------------------------------------------------------
|
-- ----------------------------------------------------------------------------------------------------------
|
ci_instr32_o <= (others => '-');
|
ci_instr32_o <= (others => '-');
|
ci_illegal_o <= '1';
|
ci_illegal_o <= '1';
|
Line 361... |
Line 364... |
ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
|
ci_instr32_o(instr_imm12_lsb_c + 0) <= ci_instr16_i(2);
|
ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
|
ci_instr32_o(instr_imm12_lsb_c + 1) <= ci_instr16_i(3);
|
ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
|
ci_instr32_o(instr_imm12_lsb_c + 2) <= ci_instr16_i(4);
|
ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
|
ci_instr32_o(instr_imm12_lsb_c + 3) <= ci_instr16_i(5);
|
ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
|
ci_instr32_o(instr_imm12_lsb_c + 4) <= ci_instr16_i(6);
|
|
if (ci_instr16_i(12) = '1') then
|
ci_illegal_o <= ci_instr16_i(12);
|
ci_illegal_o <= ci_instr16_i(12);
|
|
end if;
|
|
|
when "010" | "011" => -- C.LWSP / C.FLWSP
|
when "010" | "011" => -- C.LWSP / C.FLWSP
|
-- ----------------------------------------------------------------------------------------------------------
|
-- ----------------------------------------------------------------------------------------------------------
|
ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_load_c;
|
ci_instr32_o(instr_opcode_msb_c downto instr_opcode_lsb_c) <= opcode_load_c;
|
ci_instr32_o(21 downto 20) <= "00";
|
ci_instr32_o(21 downto 20) <= "00";
|
Line 377... |
Line 382... |
ci_instr32_o(27) <= ci_instr16_i(3);
|
ci_instr32_o(27) <= ci_instr16_i(3);
|
ci_instr32_o(31 downto 28) <= (others => '0');
|
ci_instr32_o(31 downto 28) <= (others => '0');
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_lw_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_lw_c;
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= ci_instr16_i(ci_rd_5_msb_c downto ci_rd_5_lsb_c);
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ci_instr32_o(instr_rd_msb_c downto instr_rd_lsb_c) <= ci_instr16_i(ci_rd_5_msb_c downto ci_rd_5_lsb_c);
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') then -- C.FLWSP
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') and (FPU_ENABLE = false) then -- C.FLWSP
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ci_illegal_o <= '1';
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ci_illegal_o <= '1';
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end if;
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end if;
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|
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when "110" | "111" => -- C.SWSP / C.FSWSP
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when "110" | "111" => -- C.SWSP / C.FSWSP
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
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Line 395... |
Line 400... |
ci_instr32_o(27) <= ci_instr16_i(8);
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ci_instr32_o(27) <= ci_instr16_i(8);
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ci_instr32_o(31 downto 28) <= (others => '0');
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ci_instr32_o(31 downto 28) <= (others => '0');
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sw_c;
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ci_instr32_o(instr_funct3_msb_c downto instr_funct3_lsb_c) <= funct3_sw_c;
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rs1_msb_c downto instr_rs1_lsb_c) <= "00010"; -- stack pointer
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= ci_instr16_i(ci_rs2_5_msb_c downto ci_rs2_5_lsb_c);
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ci_instr32_o(instr_rs2_msb_c downto instr_rs2_lsb_c) <= ci_instr16_i(ci_rs2_5_msb_c downto ci_rs2_5_lsb_c);
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') then -- C.FSWSP
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if (ci_instr16_i(ci_funct3_lsb_c) = '1') and (FPU_ENABLE = false) then -- C.FSWSP
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ci_illegal_o <= '1';
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ci_illegal_o <= '1';
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end if;
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end if;
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|
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when "100" => -- C.JR, C.JALR, C.MV, C.EBREAK, C.ADD
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when "100" => -- C.JR, C.JALR, C.MV, C.EBREAK, C.ADD
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-- ----------------------------------------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------------------------------------
|