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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_cpu_regfile.vhd] - Diff between revs 9 and 12
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Rev 12 |
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Line 73... |
signal rs2_read : std_ulogic_vector(data_width_c-1 downto 0); -- internal operand rs2
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signal rs2_read : std_ulogic_vector(data_width_c-1 downto 0); -- internal operand rs2
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-- reading from r0? --
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-- reading from r0? --
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signal rs1_clear, rs2_clear : std_ulogic;
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signal rs1_clear, rs2_clear : std_ulogic;
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-- attributes - these are *NOT mandatory*; just for footprint / timing optimization --
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-- -------------------------------------------------------------------------------- --
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-- lattice radiant --
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attribute syn_ramstyle : string;
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attribute syn_ramstyle of reg_file : signal is "no_rw_check";
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attribute syn_ramstyle of reg_file_emb : signal is "no_rw_check";
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-- intel quartus prime --
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attribute ramstyle : string;
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attribute ramstyle of reg_file : signal is "no_rw_check";
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attribute ramstyle of reg_file_emb : signal is "no_rw_check";
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begin
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begin
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-- Input mux ------------------------------------------------------------------------------
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-- Input mux ------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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input_mux: process(ctrl_i, mem_i, alu_i, pc_i, csr_i)
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input_mux: process(ctrl_i, mem_i, alu_i, pc_i, csr_i)
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