| Line 186... |
Line 186... |
constant sreg_resume_ack_c : natural := 2; -- -/w: CPU starts resuming
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constant sreg_resume_ack_c : natural := 2; -- -/w: CPU starts resuming
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constant sreg_execute_req_c : natural := 3; -- r/-: DM requests to execute program buffer
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constant sreg_execute_req_c : natural := 3; -- r/-: DM requests to execute program buffer
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constant sreg_execute_ack_c : natural := 4; -- -/w: CPU starts to execute program buffer
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constant sreg_execute_ack_c : natural := 4; -- -/w: CPU starts to execute program buffer
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constant sreg_exception_ack_c : natural := 5; -- -/w: CPU has detected an exception
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constant sreg_exception_ack_c : natural := 5; -- -/w: CPU has detected an exception
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-- code ROM for "park loop" --
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-- code ROM containing "park loop" --
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type code_rom_file_t is array (0 to 31) of std_ulogic_vector(31 downto 0);
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type code_rom_file_t is array (0 to 31) of std_ulogic_vector(31 downto 0);
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constant code_rom_file : code_rom_file_t := (
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constant code_rom_file : code_rom_file_t := (
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00000000 => x"0180006f",
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00000000 => x"0180006f",
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00000001 => x"7b241073",
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00000001 => x"7b241073",
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00000002 => x"02000413",
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00000002 => x"02000413",
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| Line 238... |
Line 238... |
dm_controller: process(clk_i)
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dm_controller: process(clk_i)
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begin
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begin
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if rising_edge(clk_i) then
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if rising_edge(clk_i) then
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if (dm_reg.dmcontrol_dmactive = '0') or (dmi_rstn_i = '0') then -- DM reset / DM disabled
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if (dm_reg.dmcontrol_dmactive = '0') or (dmi_rstn_i = '0') then -- DM reset / DM disabled
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dm_ctrl.state <= CMD_IDLE;
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dm_ctrl.state <= CMD_IDLE;
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dm_ctrl.ldsw_progbuf <= instr_nop_c;
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dm_ctrl.ldsw_progbuf <= (others => '-');
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dci.execute_req <= '0';
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dci.execute_req <= '0';
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dm_ctrl.pbuf_en <= '0';
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dm_ctrl.pbuf_en <= '-';
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--
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--
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dm_ctrl.illegal_cmd <= '-';
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dm_ctrl.illegal_cmd <= '-';
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dm_ctrl.illegal_state <= '-';
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dm_ctrl.illegal_state <= '-';
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dm_ctrl.cmderr <= "000";
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dm_ctrl.cmderr <= "000";
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--
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--
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| Line 304... |
Line 304... |
dm_ctrl.ldsw_progbuf <= instr_lw_c;
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dm_ctrl.ldsw_progbuf <= instr_lw_c;
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dm_ctrl.ldsw_progbuf(31 downto 20) <= dataaddr_c; -- source address
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dm_ctrl.ldsw_progbuf(31 downto 20) <= dataaddr_c; -- source address
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dm_ctrl.ldsw_progbuf(11 downto 07) <= dm_reg.command(4 downto 0); -- "regno" = destination register
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dm_ctrl.ldsw_progbuf(11 downto 07) <= dm_reg.command(4 downto 0); -- "regno" = destination register
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end if;
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end if;
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else
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else
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dm_ctrl.ldsw_progbuf <= instr_nop_c;
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dm_ctrl.ldsw_progbuf <= instr_nop_c; -- NOP - do nothing
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end if;
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end if;
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--
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--
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if (dm_reg.command(18) = '1') then -- "postexec" - execute DMI program buffer
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if (dm_reg.command(18) = '1') then -- "postexec" - execute program buffer
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dm_ctrl.pbuf_en <= '1';
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dm_ctrl.pbuf_en <= '1';
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else -- empty program buffer, execute NOPs
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else -- execute all program buffer entries as NOPs
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dm_ctrl.pbuf_en <= '0';
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dm_ctrl.pbuf_en <= '0';
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end if;
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end if;
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--
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--
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dm_ctrl.state <= CMD_EXE_TRIGGER;
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dm_ctrl.state <= CMD_EXE_TRIGGER;
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| Line 324... |
Line 324... |
dm_ctrl.state <= CMD_EXE_BUSY;
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dm_ctrl.state <= CMD_EXE_BUSY;
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end if;
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end if;
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when CMD_EXE_BUSY => -- wait for CPU to finish
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when CMD_EXE_BUSY => -- wait for CPU to finish
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-- ------------------------------------------------------------
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-- ------------------------------------------------------------
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if (dci.halt_ack = '1') then -- CPU is parked again -> execution done
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if (dci.halt_ack = '1') then -- CPU is parked (halted) again -> execution done
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dm_ctrl.state <= CMD_IDLE;
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dm_ctrl.state <= CMD_IDLE;
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end if;
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end if;
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when CMD_EXE_ERROR => -- delay cycle for error to arrive abstracts.cmderr
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when CMD_EXE_ERROR => -- delay cycle for error to arrive abstracts.cmderr
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-- ------------------------------------------------------------
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-- ------------------------------------------------------------
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| Line 339... |
Line 339... |
dm_ctrl.state <= CMD_IDLE;
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dm_ctrl.state <= CMD_IDLE;
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|
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end case;
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end case;
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|
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-- error flag register --
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-- error flags --
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-- ------------------------------------------------------------
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-- ------------------------------------------------------------
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if (dm_ctrl.cmderr = "000") then
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if (dm_ctrl.cmderr = "000") then -- set new error
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if (dm_ctrl.illegal_state = '1') then -- cannot execute since hart is not in expected state
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if (dm_ctrl.illegal_state = '1') then -- cannot execute since hart is not in expected state
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dm_ctrl.cmderr <= "100";
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dm_ctrl.cmderr <= "100";
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elsif (dci.exception_ack = '1') then -- exception during execution
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elsif (dci.exception_ack = '1') then -- exception during execution
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dm_ctrl.cmderr <= "011";
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dm_ctrl.cmderr <= "011";
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elsif (dm_ctrl.illegal_cmd = '1') then -- unsupported command
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elsif (dm_ctrl.illegal_cmd = '1') then -- unsupported command
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| Line 542... |
Line 542... |
case dmi_req_addr_i is
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case dmi_req_addr_i is
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|
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-- debug module status register --
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-- debug module status register --
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when addr_dmstatus_c =>
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when addr_dmstatus_c =>
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dmi_resp_data_o(31 downto 23) <= (others => '0'); -- reserved (r/-)
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dmi_resp_data_o(31 downto 23) <= (others => '0'); -- reserved (r/-)
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dmi_resp_data_o(22) <= '1'; -- impebreak (r/-): there is an implicit ebreak instruction after the program visible buffer
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dmi_resp_data_o(22) <= '1'; -- impebreak (r/-): there is an implicit ebreak instruction after the visible program buffer
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dmi_resp_data_o(21 downto 20) <= (others => '0'); -- reserved (r/-)
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dmi_resp_data_o(21 downto 20) <= (others => '0'); -- reserved (r/-)
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dmi_resp_data_o(19) <= dm_ctrl.hart_reset; -- allhavereset (r/-): there is only one hart that can be reset
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dmi_resp_data_o(19) <= dm_ctrl.hart_reset; -- allhavereset (r/-): there is only one hart that can be reset
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dmi_resp_data_o(18) <= dm_ctrl.hart_reset; -- anyhavereset (r/-): there is only one hart that can be reset
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dmi_resp_data_o(18) <= dm_ctrl.hart_reset; -- anyhavereset (r/-): there is only one hart that can be reset
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dmi_resp_data_o(17) <= dm_ctrl.hart_resume_ack; -- allresumeack (r/-): there is only one hart that can acknowledge resume request
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dmi_resp_data_o(17) <= dm_ctrl.hart_resume_ack; -- allresumeack (r/-): there is only one hart that can acknowledge resume request
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dmi_resp_data_o(16) <= dm_ctrl.hart_resume_ack; -- anyresumeack (r/-): there is only one hart that can acknowledge resume request
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dmi_resp_data_o(16) <= dm_ctrl.hart_resume_ack; -- anyresumeack (r/-): there is only one hart that can acknowledge resume request
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| Line 621... |
Line 621... |
when addr_progbuf0_c =>
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when addr_progbuf0_c =>
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dmi_resp_data_o <= dm_reg.progbuf(0); -- program buffer 0
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dmi_resp_data_o <= dm_reg.progbuf(0); -- program buffer 0
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when addr_progbuf1_c =>
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when addr_progbuf1_c =>
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dmi_resp_data_o <= dm_reg.progbuf(1); -- program buffer 1
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dmi_resp_data_o <= dm_reg.progbuf(1); -- program buffer 1
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|
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-- system bus access control and status (r/-) --
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-- -- system bus access control and status (r/-) --
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when addr_sbcs_c =>
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-- when addr_sbcs_c =>
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dmi_resp_data_o <= (others => '0'); -- bus access not implemented
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-- dmi_resp_data_o <= (others => '0'); -- bus access not implemented
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|
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-- halt summary 0 (r/-) --
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-- halt summary 0 (r/-) --
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when addr_haltsum0_c =>
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when addr_haltsum0_c =>
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dmi_resp_data_o(0) <= dm_ctrl.hart_halted; -- hart is halted
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dmi_resp_data_o(0) <= dm_ctrl.hart_halted; -- hart is halted
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| Line 667... |
Line 667... |
-- **************************************************************************************************************************
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-- **************************************************************************************************************************
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|
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-- Access Control ------------------------------------------------------------------------
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-- Access Control ------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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acc_en <= '1' when (cpu_addr_i(hi_abb_c downto lo_abb_c) = dm_base_c(hi_abb_c downto lo_abb_c)) else '0';
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acc_en <= '1' when (cpu_addr_i(hi_abb_c downto lo_abb_c) = dm_base_c(hi_abb_c downto lo_abb_c)) else '0';
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maddr <= cpu_addr_i(lo_abb_c-1 downto lo_abb_c-2);
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maddr <= cpu_addr_i(lo_abb_c-1 downto lo_abb_c-2); -- (sub-)module select address
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rden <= acc_en and cpu_rden_i;
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rden <= acc_en and cpu_rden_i;
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wren <= acc_en and cpu_wren_i;
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wren <= acc_en and cpu_wren_i;
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|
|
|
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-- Write Access ---------------------------------------------------------------------------
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-- Write Access ---------------------------------------------------------------------------
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| Line 709... |
Line 709... |
begin
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begin
|
if rising_edge(clk_i) then
|
if rising_edge(clk_i) then
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cpu_ack_o <= rden or wren;
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cpu_ack_o <= rden or wren;
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cpu_data_o <= (others => '0');
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cpu_data_o <= (others => '0');
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if (rden = '1') then -- output gate
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if (rden = '1') then -- output gate
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case maddr is -- read data select
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case maddr is -- module select
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when "00" => -- code ROM
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when "00" => -- code ROM
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cpu_data_o <= code_rom_file(to_integer(unsigned(cpu_addr_i(6 downto 2))));
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cpu_data_o <= code_rom_file(to_integer(unsigned(cpu_addr_i(6 downto 2))));
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when "01" => -- program buffer
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when "01" => -- program buffer
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cpu_data_o <= cpu_progbuf(to_integer(unsigned(cpu_addr_i(3 downto 2))));
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cpu_data_o <= cpu_progbuf(to_integer(unsigned(cpu_addr_i(3 downto 2))));
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when "10" => -- data buffer
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when "10" => -- data buffer
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