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package neorv32_package is
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package neorv32_package is
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-- Architecture Constants -----------------------------------------------------------------
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-- Architecture Constants -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- data width - do not change!
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constant data_width_c : natural := 32; -- data width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040400"; -- no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040402"; -- no touchy!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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-- Architecture Configuration -------------------------------------------------------------
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-- Architecture Configuration -------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant ispace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ispace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ctrl_rf_r0_we_c : natural := 18; -- allow write access to r0 (zero), also forces dst=r0
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constant ctrl_rf_r0_we_c : natural := 18; -- allow write access to r0 (zero), also forces dst=r0
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-- alu --
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-- alu --
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constant ctrl_alu_cmd0_c : natural := 19; -- ALU command bit 0
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constant ctrl_alu_cmd0_c : natural := 19; -- ALU command bit 0
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constant ctrl_alu_cmd1_c : natural := 20; -- ALU command bit 1
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constant ctrl_alu_cmd1_c : natural := 20; -- ALU command bit 1
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constant ctrl_alu_cmd2_c : natural := 21; -- ALU command bit 2
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constant ctrl_alu_cmd2_c : natural := 21; -- ALU command bit 2
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constant ctrl_alu_opa_mux_c : natural := 22; -- operand A select (0=rs1, 1=PC)
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constant ctrl_alu_addsub_c : natural := 22; -- 0=ADD, 1=SUB
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constant ctrl_alu_opb_mux_c : natural := 23; -- operand B select (0=rs2, 1=IMM)
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constant ctrl_alu_opa_mux_c : natural := 23; -- operand A select (0=rs1, 1=PC)
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constant ctrl_alu_opc_mux_c : natural := 24; -- operand C select (0=rs2, 1=IMM)
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constant ctrl_alu_opb_mux_c : natural := 24; -- operand B select (0=rs2, 1=IMM)
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constant ctrl_alu_unsigned_c : natural := 25; -- is unsigned ALU operation
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constant ctrl_alu_unsigned_c : natural := 25; -- is unsigned ALU operation
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constant ctrl_alu_shift_dir_c : natural := 26; -- shift direction (0=left, 1=right)
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constant ctrl_alu_shift_dir_c : natural := 26; -- shift direction (0=left, 1=right)
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constant ctrl_alu_shift_ar_c : natural := 27; -- is arithmetic shift
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constant ctrl_alu_shift_ar_c : natural := 27; -- is arithmetic shift
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-- bus interface --
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-- bus interface --
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constant ctrl_bus_size_lsb_c : natural := 28; -- transfer size lsb (00=byte, 01=half-word)
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constant ctrl_bus_size_lsb_c : natural := 28; -- transfer size lsb (00=byte, 01=half-word)
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constant ctrl_bus_ierr_ack_c : natural := 37; -- acknowledge instruction fetch bus exceptions
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constant ctrl_bus_ierr_ack_c : natural := 37; -- acknowledge instruction fetch bus exceptions
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constant ctrl_bus_derr_ack_c : natural := 38; -- acknowledge data access bus exceptions
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constant ctrl_bus_derr_ack_c : natural := 38; -- acknowledge data access bus exceptions
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constant ctrl_bus_fence_c : natural := 39; -- executed fence operation
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constant ctrl_bus_fence_c : natural := 39; -- executed fence operation
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constant ctrl_bus_fencei_c : natural := 40; -- executed fencei operation
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constant ctrl_bus_fencei_c : natural := 40; -- executed fencei operation
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-- co-processors --
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-- co-processors --
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constant ctrl_cp_use_c : natural := 41; -- is cp operation
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constant ctrl_cp_id_lsb_c : natural := 41; -- cp select ID lsb
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constant ctrl_cp_id_lsb_c : natural := 42; -- cp select ID lsb
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constant ctrl_cp_id_msb_c : natural := 42; -- cp select ID msb
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constant ctrl_cp_id_msb_c : natural := 43; -- cp select ID msb
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constant ctrl_cp_cmd0_c : natural := 43; -- cp command bit 0
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constant ctrl_cp_cmd0_c : natural := 44; -- cp command bit 0
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constant ctrl_cp_cmd1_c : natural := 44; -- cp command bit 1
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constant ctrl_cp_cmd1_c : natural := 45; -- cp command bit 1
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constant ctrl_cp_cmd2_c : natural := 45; -- cp command bit 2
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constant ctrl_cp_cmd2_c : natural := 46; -- cp command bit 2
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-- control bus size --
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-- control bus size --
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constant ctrl_width_c : natural := 47; -- control bus size
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constant ctrl_width_c : natural := 46; -- control bus size
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constant ctrl_alu_aopb_inv_c : natural := 48;
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-- ALU Comparator Bus ---------------------------------------------------------------------
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-- ALU Comparator Bus ---------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant alu_cmp_equal_c : natural := 0;
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constant alu_cmp_equal_c : natural := 0;
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constant alu_cmp_less_c : natural := 1; -- for signed and unsigned comparisons
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constant alu_cmp_less_c : natural := 1; -- for signed and unsigned comparisons
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constant opcode_auipc_c : std_ulogic_vector(6 downto 0) := "0010111"; -- add upper immediate to PC
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constant opcode_auipc_c : std_ulogic_vector(6 downto 0) := "0010111"; -- add upper immediate to PC
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constant opcode_alui_c : std_ulogic_vector(6 downto 0) := "0010011"; -- ALU operation with immediate (operation via funct3 and funct7)
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constant opcode_alui_c : std_ulogic_vector(6 downto 0) := "0010011"; -- ALU operation with immediate (operation via funct3 and funct7)
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constant opcode_alu_c : std_ulogic_vector(6 downto 0) := "0110011"; -- ALU operation (operation via funct3 and funct7)
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constant opcode_alu_c : std_ulogic_vector(6 downto 0) := "0110011"; -- ALU operation (operation via funct3 and funct7)
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-- control flow --
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-- control flow --
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constant opcode_jal_c : std_ulogic_vector(6 downto 0) := "1101111"; -- jump and link
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constant opcode_jal_c : std_ulogic_vector(6 downto 0) := "1101111"; -- jump and link
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constant opcode_jalr_c : std_ulogic_vector(6 downto 0) := "1100111"; -- jump and register
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constant opcode_jalr_c : std_ulogic_vector(6 downto 0) := "1100111"; -- jump and link with register
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constant opcode_branch_c : std_ulogic_vector(6 downto 0) := "1100011"; -- branch (condition set via funct3)
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constant opcode_branch_c : std_ulogic_vector(6 downto 0) := "1100011"; -- branch (condition set via funct3)
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-- memory access --
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-- memory access --
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constant opcode_load_c : std_ulogic_vector(6 downto 0) := "0000011"; -- load (data type via funct3)
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constant opcode_load_c : std_ulogic_vector(6 downto 0) := "0000011"; -- load (data type via funct3)
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constant opcode_store_c : std_ulogic_vector(6 downto 0) := "0100011"; -- store (data type via funct3)
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constant opcode_store_c : std_ulogic_vector(6 downto 0) := "0100011"; -- store (data type via funct3)
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-- system/csr --
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-- system/csr --
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constant funct12_ecall_c : std_ulogic_vector(11 downto 0) := x"000"; -- ECALL
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constant funct12_ecall_c : std_ulogic_vector(11 downto 0) := x"000"; -- ECALL
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constant funct12_ebreak_c : std_ulogic_vector(11 downto 0) := x"001"; -- EBREAK
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constant funct12_ebreak_c : std_ulogic_vector(11 downto 0) := x"001"; -- EBREAK
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constant funct12_mret_c : std_ulogic_vector(11 downto 0) := x"302"; -- MRET
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constant funct12_mret_c : std_ulogic_vector(11 downto 0) := x"302"; -- MRET
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constant funct12_wfi_c : std_ulogic_vector(11 downto 0) := x"105"; -- WFI
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constant funct12_wfi_c : std_ulogic_vector(11 downto 0) := x"105"; -- WFI
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-- RISC-V CSR Addresses -------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300"; -- mstatus
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constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301"; -- misa
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constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304"; -- mie
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constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305"; -- mtvec
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--
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constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340"; -- mscratch
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constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341"; -- mepc
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constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342"; -- mcause
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constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343"; -- mtval
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constant csr_mip_c : std_ulogic_vector(11 downto 0) := x"344"; -- mip
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--
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constant csr_pmpcfg0_c : std_ulogic_vector(11 downto 0) := x"3a0"; -- pmpcfg0
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constant csr_pmpcfg1_c : std_ulogic_vector(11 downto 0) := x"3a1"; -- pmpcfg1
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--
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constant csr_pmpaddr0_c : std_ulogic_vector(11 downto 0) := x"3b0"; -- pmpaddr0
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constant csr_pmpaddr1_c : std_ulogic_vector(11 downto 0) := x"3b1"; -- pmpaddr1
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constant csr_pmpaddr2_c : std_ulogic_vector(11 downto 0) := x"3b2"; -- pmpaddr2
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constant csr_pmpaddr3_c : std_ulogic_vector(11 downto 0) := x"3b3"; -- pmpaddr3
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constant csr_pmpaddr4_c : std_ulogic_vector(11 downto 0) := x"3b4"; -- pmpaddr4
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constant csr_pmpaddr5_c : std_ulogic_vector(11 downto 0) := x"3b5"; -- pmpaddr5
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constant csr_pmpaddr6_c : std_ulogic_vector(11 downto 0) := x"3b6"; -- pmpaddr6
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constant csr_pmpaddr7_c : std_ulogic_vector(11 downto 0) := x"3b7"; -- pmpaddr7
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--
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constant csr_mcycle_c : std_ulogic_vector(11 downto 0) := x"b00"; -- mcycle
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constant csr_minstret_c : std_ulogic_vector(11 downto 0) := x"b02"; -- minstret
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--
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constant csr_mcycleh_c : std_ulogic_vector(11 downto 0) := x"b80"; -- mcycleh
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constant csr_minstreth_c : std_ulogic_vector(11 downto 0) := x"b82"; -- minstreth
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--
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constant csr_cycle_c : std_ulogic_vector(11 downto 0) := x"c00"; -- cycle
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constant csr_time_c : std_ulogic_vector(11 downto 0) := x"c01"; -- time
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constant csr_instret_c : std_ulogic_vector(11 downto 0) := x"c02"; -- instret
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--
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constant csr_cycleh_c : std_ulogic_vector(11 downto 0) := x"c80"; -- cycleh
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constant csr_timeh_c : std_ulogic_vector(11 downto 0) := x"c81"; -- timeh
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constant csr_instreth_c : std_ulogic_vector(11 downto 0) := x"c82"; -- instreth
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--
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constant csr_mvendorid_c : std_ulogic_vector(11 downto 0) := x"f11"; -- mvendorid
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constant csr_marchid_c : std_ulogic_vector(11 downto 0) := x"f12"; -- marchid
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constant csr_mimpid_c : std_ulogic_vector(11 downto 0) := x"f13"; -- mimpid
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constant csr_mhartid_c : std_ulogic_vector(11 downto 0) := x"f14"; -- mhartid
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--
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constant csr_mzext_c : std_ulogic_vector(11 downto 0) := x"fc0"; -- mzext
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-- Co-Processor Operations ----------------------------------------------------------------
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-- Co-Processor Operations ----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- cp ids --
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-- cp ids --
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constant cp_sel_muldiv_c : std_ulogic_vector(1 downto 0) := "00"; -- MULDIV CP
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constant cp_sel_muldiv_c : std_ulogic_vector(1 downto 0) := "00"; -- MULDIV CP
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-- muldiv cp --
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-- muldiv cp --
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constant cp_op_rem_c : std_ulogic_vector(2 downto 0) := "110"; -- rem
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constant cp_op_rem_c : std_ulogic_vector(2 downto 0) := "110"; -- rem
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constant cp_op_remu_c : std_ulogic_vector(2 downto 0) := "111"; -- remu
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constant cp_op_remu_c : std_ulogic_vector(2 downto 0) := "111"; -- remu
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-- ALU Function Codes ---------------------------------------------------------------------
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-- ALU Function Codes ---------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant alu_cmd_add_c : std_ulogic_vector(2 downto 0) := "000"; -- r <= A + B
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constant alu_cmd_addsub_c : std_ulogic_vector(2 downto 0) := "000"; -- r <= A +/- B
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constant alu_cmd_sub_c : std_ulogic_vector(2 downto 0) := "001"; -- r <= A - B
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constant alu_cmd_slt_c : std_ulogic_vector(2 downto 0) := "001"; -- r <= A < B
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constant alu_cmd_slt_c : std_ulogic_vector(2 downto 0) := "010"; -- r <= A < B
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constant alu_cmd_cp_c : std_ulogic_vector(2 downto 0) := "010"; -- r <= CP result (iterative)
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constant alu_cmd_shift_c : std_ulogic_vector(2 downto 0) := "011"; -- r <= A <</>> B
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constant alu_cmd_shift_c : std_ulogic_vector(2 downto 0) := "011"; -- r <= A <</>> B (iterative)
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constant alu_cmd_xor_c : std_ulogic_vector(2 downto 0) := "100"; -- r <= A xor B
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constant alu_cmd_movb_c : std_ulogic_vector(2 downto 0) := "100"; -- r <= B
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constant alu_cmd_or_c : std_ulogic_vector(2 downto 0) := "101"; -- r <= A or B
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constant alu_cmd_xor_c : std_ulogic_vector(2 downto 0) := "101"; -- r <= A xor B
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constant alu_cmd_and_c : std_ulogic_vector(2 downto 0) := "110"; -- r <= A and B
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constant alu_cmd_or_c : std_ulogic_vector(2 downto 0) := "110"; -- r <= A or B
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constant alu_cmd_movb_c : std_ulogic_vector(2 downto 0) := "111"; -- r <= B
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constant alu_cmd_and_c : std_ulogic_vector(2 downto 0) := "111"; -- r <= A and B
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-- Trap ID Codes --------------------------------------------------------------------------
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-- Trap ID Codes --------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- risc-v compliant --
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-- risc-v compliant --
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constant trap_ima_c : std_ulogic_vector(5 downto 0) := "000000"; -- 0.0: instruction misaligned
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constant trap_ima_c : std_ulogic_vector(5 downto 0) := "000000"; -- 0.0: instruction misaligned
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--
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--
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constant interrupt_width_c : natural := 7; -- length of this list in bits
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constant interrupt_width_c : natural := 7; -- length of this list in bits
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-- CPU Privilege Modes --------------------------------------------------------------------
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-- CPU Privilege Modes --------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant m_priv_mode_c : std_ulogic_vector(1 downto 0) := "11"; -- machine mode
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constant priv_mode_m_c : std_ulogic_vector(1 downto 0) := "11"; -- machine mode
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constant u_priv_mode_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
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constant priv_mode_u_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
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-- Clock Generator -------------------------------------------------------------------------
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-- Clock Generator -------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant clk_div2_c : natural := 0;
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constant clk_div2_c : natural := 0;
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constant clk_div4_c : natural := 1;
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constant clk_div4_c : natural := 1;
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bus_i_wait_i : in std_ulogic; -- wait for bus
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bus_i_wait_i : in std_ulogic; -- wait for bus
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bus_d_wait_i : in std_ulogic; -- wait for bus
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bus_d_wait_i : in std_ulogic; -- wait for bus
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-- data input --
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-- data input --
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instr_i : in std_ulogic_vector(data_width_c-1 downto 0); -- instruction
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instr_i : in std_ulogic_vector(data_width_c-1 downto 0); -- instruction
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cmp_i : in std_ulogic_vector(1 downto 0); -- comparator status
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cmp_i : in std_ulogic_vector(1 downto 0); -- comparator status
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alu_add_i : in std_ulogic_vector(data_width_c-1 downto 0); -- ALU.add result
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alu_res_i : in std_ulogic_vector(data_width_c-1 downto 0); -- ALU processing result
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alu_res_i : in std_ulogic_vector(data_width_c-1 downto 0); -- ALU processing result
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-- data output --
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-- data output --
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imm_o : out std_ulogic_vector(data_width_c-1 downto 0); -- immediate
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imm_o : out std_ulogic_vector(data_width_c-1 downto 0); -- immediate
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fetch_pc_o : out std_ulogic_vector(data_width_c-1 downto 0); -- PC for instruction fetch
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fetch_pc_o : out std_ulogic_vector(data_width_c-1 downto 0); -- PC for instruction fetch
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curr_pc_o : out std_ulogic_vector(data_width_c-1 downto 0); -- current PC (corresponding to current instruction)
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curr_pc_o : out std_ulogic_vector(data_width_c-1 downto 0); -- current PC (corresponding to current instruction)
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rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
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rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
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pc2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- delayed PC
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pc2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- delayed PC
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imm_i : in std_ulogic_vector(data_width_c-1 downto 0); -- immediate
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imm_i : in std_ulogic_vector(data_width_c-1 downto 0); -- immediate
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-- data output --
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-- data output --
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cmp_o : out std_ulogic_vector(1 downto 0); -- comparator status
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cmp_o : out std_ulogic_vector(1 downto 0); -- comparator status
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add_o : out std_ulogic_vector(data_width_c-1 downto 0); -- OPA + OPB
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res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- ALU result
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res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- ALU result
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-- co-processor interface --
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-- co-processor interface --
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cp0_start_o : out std_ulogic; -- trigger co-processor 0
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cp0_start_o : out std_ulogic; -- trigger co-processor 0
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cp0_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 0 result
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cp0_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 0 result
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cp0_valid_i : in std_ulogic; -- co-processor 0 result valid
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cp0_valid_i : in std_ulogic; -- co-processor 0 result valid
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