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package neorv32_package is
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package neorv32_package is
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-- Architecture Constants -----------------------------------------------------------------
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-- Architecture Constants -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- data width - do not change!
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constant data_width_c : natural := 32; -- data width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040408"; -- no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040500"; -- no touchy!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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-- Architecture Configuration -------------------------------------------------------------
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-- Architecture Configuration -------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant ispace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ispace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant dspace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"80000000"; -- default data memory address space base address
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constant dspace_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"80000000"; -- default data memory address space base address
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constant bus_timeout_c : natural := 127; -- cycles after which a valid bus access will timeout and triggers an access exception
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constant bus_timeout_c : natural := 127; -- cycles after which a valid bus access will timeout and triggers an access exception
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constant wb_pipe_mode_c : boolean := false; -- false: classic/standard wishbone mode, true: pipelined wishbone mode (better timing)
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constant wb_pipe_mode_c : boolean := false; -- false: classic/standard wishbone mode, true: pipelined wishbone mode (better timing)
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constant ipb_entries_c : natural := 2; -- entries in instruction prefetch buffer, must be a power of 2, default=2
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constant ipb_entries_c : natural := 2; -- entries in instruction prefetch buffer, must be a power of 2, default=2
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constant rf_r0_is_reg_c : boolean := true; -- reg_file.r0 is a physical register that has to be initialized to zero
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constant rf_r0_is_reg_c : boolean := true; -- reg_file.r0 is a physical register that has to be initialized to zero by the CPU HW
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-- Helper Functions -----------------------------------------------------------------------
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-- Helper Functions -----------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function index_size_f(input : natural) return natural;
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function index_size_f(input : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xnor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xnor_all_f(a : std_ulogic_vector) return std_ulogic;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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-- Internal Types -------------------------------------------------------------------------
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-- Internal Types -------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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type pmp_ctrl_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(7 downto 0);
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type pmp_ctrl_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(7 downto 0);
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type pmp_addr_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(33 downto 0);
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type pmp_addr_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(33 downto 0);
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when others => output_v := '?';
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when others => output_v := '?';
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end case;
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end case;
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return output_v;
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return output_v;
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end function to_hexchar_f;
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end function to_hexchar_f;
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-- Function: Bit reversal -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector is
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variable output_v : std_ulogic_vector(input'range);
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begin
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for i in 0 to input'length-1 loop
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output_v(input'length-i-1) := input(i);
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end loop; -- i
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return output_v;
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end function bit_rev_f;
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end neorv32_package;
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end neorv32_package;
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