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package neorv32_package is
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package neorv32_package is
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-- Architecture Configuration -------------------------------------------------------------
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-- Architecture Configuration -------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- address space --
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constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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constant bus_timeout_c : natural := 127; -- cycles after which an *unacknowledged* bus access will timeout and trigger an access exception
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constant wb_pipe_mode_c : boolean := false; -- false: classic/standard wishbone mode, true: pipelined wishbone mode
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constant ipb_entries_c : natural := 2; -- entries in instruction prefetch buffer, must be a power of 2, default=2
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constant rf_r0_is_reg_c : boolean := true; -- reg_file.r0 is a physical register that has to be initialized to zero by the CPU HW
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-- Architecture Constants -----------------------------------------------------------------
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-- (external) bus interface --
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constant bus_timeout_c : natural := 127; -- cycles after which an *unacknowledged* bus access will timeout and trigger a bus access exception (min 3)
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constant wb_pipe_mode_c : boolean := false; -- *external* bus protocol: false=classic/standard wishbone mode (default), true=pipelined wishbone mode
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constant xbus_big_endian_c : boolean := true; -- external memory access byte order: true=big endian (default); false=little endian
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-- CPU core --
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constant ipb_entries_c : natural := 2; -- entries in CPU instruction prefetch buffer, must be a power of 2, default=2
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constant zicnt_en_c : boolean := true; -- enable RISC-V performance counters ([m]cycle[h], [m]instret[h]), default=true
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-- physical memory protection (PMP) --
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constant pmp_num_regions_c : natural := 2; -- number of regions (1..8)
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constant pmp_min_granularity_c : natural := 64*1024; -- minimal region size (granularity), min 8 bytes, has to be a power of 2
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-- Architecture Constants (do not modify!)= -----------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- data width - do not change!
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constant data_width_c : natural := 32; -- data width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040801"; -- no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01040900"; -- no touchy!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant rf_r0_is_reg_c : boolean := true; -- reg_file.r0 is a physical register that has to be initialized to zero by the HW
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-- Helper Functions -----------------------------------------------------------------------
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-- Helper Functions -----------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function index_size_f(input : natural) return natural;
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function index_size_f(input : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xnor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xnor_all_f(a : std_ulogic_vector) return std_ulogic;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function is_power_of_two_f(input : natural) return boolean;
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function is_power_of_two_f(input : natural) return boolean;
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function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
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-- Internal Types -------------------------------------------------------------------------
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-- Internal Types -------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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type pmp_ctrl_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(7 downto 0);
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type pmp_ctrl_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(7 downto 0);
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type pmp_addr_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(33 downto 0);
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type pmp_addr_if_t is array (0 to pmp_max_r_c-1) of std_ulogic_vector(33 downto 0);
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300"; -- mstatus
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constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300"; -- mstatus
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constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301"; -- misa
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constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301"; -- misa
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constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304"; -- mie
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constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304"; -- mie
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constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305"; -- mtvec
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constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305"; -- mtvec
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constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310"; -- mstatush
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--
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--
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constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340"; -- mscratch
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constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340"; -- mscratch
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constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341"; -- mepc
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constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341"; -- mepc
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constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342"; -- mcause
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constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342"; -- mcause
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constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343"; -- mtval
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constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343"; -- mtval
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constant trap_brk_c : std_ulogic_vector(5 downto 0) := "0" & "00011"; -- 0.3: breakpoint
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constant trap_brk_c : std_ulogic_vector(5 downto 0) := "0" & "00011"; -- 0.3: breakpoint
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constant trap_lma_c : std_ulogic_vector(5 downto 0) := "0" & "00100"; -- 0.4: load address misaligned
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constant trap_lma_c : std_ulogic_vector(5 downto 0) := "0" & "00100"; -- 0.4: load address misaligned
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constant trap_lbe_c : std_ulogic_vector(5 downto 0) := "0" & "00101"; -- 0.5: load access fault
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constant trap_lbe_c : std_ulogic_vector(5 downto 0) := "0" & "00101"; -- 0.5: load access fault
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constant trap_sma_c : std_ulogic_vector(5 downto 0) := "0" & "00110"; -- 0.6: store address misaligned
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constant trap_sma_c : std_ulogic_vector(5 downto 0) := "0" & "00110"; -- 0.6: store address misaligned
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constant trap_sbe_c : std_ulogic_vector(5 downto 0) := "0" & "00111"; -- 0.7: store access fault
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constant trap_sbe_c : std_ulogic_vector(5 downto 0) := "0" & "00111"; -- 0.7: store access fault
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constant trap_uenv_c : std_ulogic_vector(5 downto 0) := "0" & "01000"; -- 0.8: environment call from u-mode
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constant trap_menv_c : std_ulogic_vector(5 downto 0) := "0" & "01011"; -- 0.11: environment call from m-mode
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constant trap_menv_c : std_ulogic_vector(5 downto 0) := "0" & "01011"; -- 0.11: environment call from m-mode
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-- RISC-V compliant interrupts --
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-- RISC-V compliant interrupts --
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constant trap_msi_c : std_ulogic_vector(5 downto 0) := "1" & "00011"; -- 1.3: machine software interrupt
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constant trap_msi_c : std_ulogic_vector(5 downto 0) := "1" & "00011"; -- 1.3: machine software interrupt
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constant trap_mti_c : std_ulogic_vector(5 downto 0) := "1" & "00111"; -- 1.7: machine timer interrupt
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constant trap_mti_c : std_ulogic_vector(5 downto 0) := "1" & "00111"; -- 1.7: machine timer interrupt
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constant trap_mei_c : std_ulogic_vector(5 downto 0) := "1" & "01011"; -- 1.11: machine external interrupt
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constant trap_mei_c : std_ulogic_vector(5 downto 0) := "1" & "01011"; -- 1.11: machine external interrupt
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-- NEORV32-specific (custom) interrupts --
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-- NEORV32-specific (custom) interrupts --
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constant trap_reset_c : std_ulogic_vector(5 downto 0) := "1" & "00000"; -- 1.0: hardware reset
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constant trap_firq0_c : std_ulogic_vector(5 downto 0) := "1" & "10000"; -- 1.16: fast interrupt 0
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constant trap_firq0_c : std_ulogic_vector(5 downto 0) := "1" & "10000"; -- 1.16: fast interrupt 0
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constant trap_firq1_c : std_ulogic_vector(5 downto 0) := "1" & "10001"; -- 1.17: fast interrupt 1
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constant trap_firq1_c : std_ulogic_vector(5 downto 0) := "1" & "10001"; -- 1.17: fast interrupt 1
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constant trap_firq2_c : std_ulogic_vector(5 downto 0) := "1" & "10010"; -- 1.18: fast interrupt 2
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constant trap_firq2_c : std_ulogic_vector(5 downto 0) := "1" & "10010"; -- 1.18: fast interrupt 2
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constant trap_firq3_c : std_ulogic_vector(5 downto 0) := "1" & "10011"; -- 1.19: fast interrupt 3
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constant trap_firq3_c : std_ulogic_vector(5 downto 0) := "1" & "10011"; -- 1.19: fast interrupt 3
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Line 457... |
-- exception source bits --
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-- exception source bits --
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constant exception_iaccess_c : natural := 0; -- instrution access fault
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constant exception_iaccess_c : natural := 0; -- instrution access fault
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constant exception_iillegal_c : natural := 1; -- illegal instrution
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constant exception_iillegal_c : natural := 1; -- illegal instrution
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constant exception_ialign_c : natural := 2; -- instrution address misaligned
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constant exception_ialign_c : natural := 2; -- instrution address misaligned
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constant exception_m_envcall_c : natural := 3; -- ENV call from m-mode
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constant exception_m_envcall_c : natural := 3; -- ENV call from m-mode
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constant exception_break_c : natural := 4; -- breakpoint
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constant exception_u_envcall_c : natural := 4; -- ENV call from u-mode
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constant exception_salign_c : natural := 5; -- store address misaligned
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constant exception_break_c : natural := 5; -- breakpoint
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constant exception_lalign_c : natural := 6; -- load address misaligned
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constant exception_salign_c : natural := 6; -- store address misaligned
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constant exception_saccess_c : natural := 7; -- store access fault
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constant exception_lalign_c : natural := 7; -- load address misaligned
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constant exception_laccess_c : natural := 8; -- load access fault
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constant exception_saccess_c : natural := 8; -- store access fault
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constant exception_laccess_c : natural := 9; -- load access fault
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--
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--
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constant exception_width_c : natural := 9; -- length of this list in bits
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constant exception_width_c : natural := 10; -- length of this list in bits
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-- interrupt source bits --
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-- interrupt source bits --
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constant interrupt_msw_irq_c : natural := 0; -- machine software interrupt
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constant interrupt_msw_irq_c : natural := 0; -- machine software interrupt
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constant interrupt_mtime_irq_c : natural := 1; -- machine timer interrupt
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constant interrupt_mtime_irq_c : natural := 1; -- machine timer interrupt
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constant interrupt_mext_irq_c : natural := 2; -- machine external interrupt
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constant interrupt_mext_irq_c : natural := 2; -- machine external interrupt
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constant interrupt_firq_0_c : natural := 3; -- fast interrupt channel 0
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constant interrupt_firq_0_c : natural := 3; -- fast interrupt channel 0
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| Line 497... |
Line 514... |
-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
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FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
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FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
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-- Physical Memory Protection (PMP) --
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-- Physical Memory Protection (PMP) --
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PMP_USE : boolean := false; -- implement PMP?
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PMP_USE : boolean := false; -- implement PMP?
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PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
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PMP_GRANULARITY : natural := 14; -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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-- Internal Instruction memory --
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-- Internal Instruction memory --
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MEM_INT_IMEM_USE : boolean := true; -- implement processor-internal instruction memory
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MEM_INT_IMEM_USE : boolean := true; -- implement processor-internal instruction memory
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MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
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MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
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MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
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MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
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-- Internal Data memory --
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-- Internal Data memory --
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| Line 555... |
Line 570... |
-- TWI --
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-- TWI --
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twi_sda_io : inout std_logic; -- twi serial data line
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twi_sda_io : inout std_logic; -- twi serial data line
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twi_scl_io : inout std_logic; -- twi serial clock line
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twi_scl_io : inout std_logic; -- twi serial clock line
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-- PWM --
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-- PWM --
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pwm_o : out std_ulogic_vector(03 downto 0); -- pwm channels
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pwm_o : out std_ulogic_vector(03 downto 0); -- pwm channels
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-- system time input from external MTIME (available if IO_MTIME_USE = false) --
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mtime_i : in std_ulogic_vector(63 downto 0) := (others => '0'); -- current system time
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-- Interrupts --
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-- Interrupts --
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mtime_irq_i : in std_ulogic := '0'; -- machine timer interrupt, available if IO_MTIME_USE = false
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mtime_irq_i : in std_ulogic := '0'; -- machine timer interrupt, available if IO_MTIME_USE = false
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msw_irq_i : in std_ulogic := '0'; -- machine software interrupt
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msw_irq_i : in std_ulogic := '0'; -- machine software interrupt
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mext_irq_i : in std_ulogic := '0' -- machine external interrupt
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mext_irq_i : in std_ulogic := '0' -- machine external interrupt
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);
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);
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| Line 581... |
Line 598... |
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
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FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
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FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
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-- Physical Memory Protection (PMP) --
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-- Physical Memory Protection (PMP) --
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PMP_USE : boolean := false; -- implement PMP?
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PMP_USE : boolean := false -- implement PMP?
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PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
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PMP_GRANULARITY : natural := 14 -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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);
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);
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port (
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port (
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-- global control --
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-- global control --
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clk_i : in std_ulogic := '0'; -- global clock, rising edge
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clk_i : in std_ulogic := '0'; -- global clock, rising edge
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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| Line 642... |
Line 657... |
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
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CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
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CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
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CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
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CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
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CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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-- Physical memory protection (PMP) --
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-- Physical memory protection (PMP) --
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PMP_USE : boolean := false; -- implement physical memory protection?
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PMP_USE : boolean := false -- implement physical memory protection?
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PMP_NUM_REGIONS : natural := 4; -- number of regions (1..4)
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PMP_GRANULARITY : natural := 0 -- granularity (0=none, 1=8B, 2=16B, 3=32B, ...)
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);
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);
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port (
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port (
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-- global control --
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-- global control --
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clk_i : in std_ulogic; -- global clock, rising edge
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clk_i : in std_ulogic; -- global clock, rising edge
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rstn_i : in std_ulogic; -- global reset, low-active, async
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rstn_i : in std_ulogic; -- global reset, low-active, async
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| Line 774... |
Line 787... |
-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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component neorv32_cpu_bus
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component neorv32_cpu_bus
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generic (
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generic (
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CPU_EXTENSION_RISCV_C : boolean := true; -- implement compressed extension?
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CPU_EXTENSION_RISCV_C : boolean := true; -- implement compressed extension?
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-- Physical memory protection (PMP) --
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-- Physical memory protection (PMP) --
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PMP_USE : boolean := false; -- implement physical memory protection?
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PMP_USE : boolean := false -- implement physical memory protection?
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PMP_NUM_REGIONS : natural := 4; -- number of regions (1..4)
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PMP_GRANULARITY : natural := 0 -- granularity (1=8B, 2=16B, 3=32B, ...)
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);
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);
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port (
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port (
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-- global control --
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-- global control --
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clk_i : in std_ulogic; -- global clock, rising edge
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clk_i : in std_ulogic; -- global clock, rising edge
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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| Line 1345... |
Line 1356... |
end loop; -- i
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end loop; -- i
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end if;
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end if;
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return tmp_v;
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return tmp_v;
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end function xnor_all_f;
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end function xnor_all_f;
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-- Function: Convert to hex char ----------------------------------------------------------
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-- Function: Convert std_ulogic_vector to hex char ----------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character is
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character is
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variable output_v : character;
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variable output_v : character;
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begin
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begin
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case input is
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case input is
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| Line 1372... |
Line 1383... |
when others => output_v := '?';
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when others => output_v := '?';
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end case;
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end case;
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return output_v;
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return output_v;
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end function to_hexchar_f;
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end function to_hexchar_f;
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-- Function: Convert hex char to std_ulogic_vector ----------------------------------------
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-- -------------------------------------------------------------------------------------------
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector is
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variable hex_value_v : std_ulogic_vector(3 downto 0);
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begin
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case input is
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when '0' => hex_value_v := x"0";
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when '1' => hex_value_v := x"1";
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when '2' => hex_value_v := x"2";
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when '3' => hex_value_v := x"3";
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when '4' => hex_value_v := x"4";
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when '5' => hex_value_v := x"5";
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when '6' => hex_value_v := x"6";
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when '7' => hex_value_v := x"7";
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when '8' => hex_value_v := x"8";
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when '9' => hex_value_v := x"9";
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when 'a' | 'A' => hex_value_v := x"a";
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when 'b' | 'B' => hex_value_v := x"b";
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when 'c' | 'C' => hex_value_v := x"c";
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when 'd' | 'D' => hex_value_v := x"d";
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when 'e' | 'E' => hex_value_v := x"e";
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when 'f' | 'F' => hex_value_v := x"f";
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when others => hex_value_v := (others => 'X');
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end case;
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return hex_value_v;
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end function hexchar_to_stdulogicvector_f;
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-- Function: Bit reversal -----------------------------------------------------------------
|
-- Function: Bit reversal -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector is
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector is
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variable output_v : std_ulogic_vector(input'range);
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variable output_v : std_ulogic_vector(input'range);
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begin
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begin
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| Line 1396... |
Line 1434... |
else
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else
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return false;
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return false;
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end if;
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end if;
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end function is_power_of_two_f;
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end function is_power_of_two_f;
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-- Function: Swap all bytes of a 32-bit word (endianness conversion) ----------------------
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-- -------------------------------------------------------------------------------------------
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function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector is
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variable output_v : std_ulogic_vector(input'range);
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begin
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output_v(07 downto 00) := input(31 downto 24);
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output_v(15 downto 08) := input(23 downto 16);
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output_v(23 downto 16) := input(15 downto 08);
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output_v(31 downto 24) := input(07 downto 00);
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return output_v;
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end function bswap32_f;
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end neorv32_package;
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end neorv32_package;
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No newline at end of file
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