| Line 50... |
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constant xbus_big_endian_c : boolean := true; -- external memory access byte order: true=big endian (default); false=little endian
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constant xbus_big_endian_c : boolean := true; -- external memory access byte order: true=big endian (default); false=little endian
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-- CPU core --
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-- CPU core --
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constant ipb_entries_c : natural := 2; -- entries in CPU instruction prefetch buffer, has to be a power of 2, default=2
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constant ipb_entries_c : natural := 2; -- entries in CPU instruction prefetch buffer, has to be a power of 2, default=2
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constant cp_timeout_en_c : boolean := false; -- auto-terminate pending co-processor operations after 256 cycles (for debugging only), default = false
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constant cp_timeout_en_c : boolean := false; -- auto-terminate pending co-processor operations after 256 cycles (for debugging only), default = false
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constant dedicated_reset_c : boolean := false; -- use dedicated hardware reset value for UNCRITICAL registers (FALSE=reset value is irrelevant (might simplify HW), default; TRUE=defined LOW reset value)
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-- "critical" number of implemented PMP regions --
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-- "critical" number of implemented PMP regions --
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-- if more PMP regions (> pmp_num_regions_critical_c) are defined, another register stage is automatically inserted into the memory interfaces
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-- if more PMP regions (> pmp_num_regions_critical_c) are defined, another register stage is automatically inserted into the memory interfaces
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-- increasing instruction fetch & data access latency by +1 cycle but also reducing critical path length
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-- increasing instruction fetch & data access latency by +1 cycle but also reducing critical path length
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constant pmp_num_regions_critical_c : natural := 8; -- default=8
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constant pmp_num_regions_critical_c : natural := 8; -- default=8
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-- Architecture Constants (do not modify!) ------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- native data path width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01050302"; -- no touchy!
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constant pmp_max_r_c : natural := 8; -- max PMP regions - FIXED!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant rf_r0_is_reg_c : boolean := true; -- reg_file.r0 is a *physical register* that has to be initialized to zero by the CPU HW
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-- Helper Functions -----------------------------------------------------------------------
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-- Helper Functions -----------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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function index_size_f(input : natural) return natural;
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function index_size_f(input : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function cond_sel_natural_f(cond : boolean; val_t : natural; val_f : natural) return natural;
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function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer;
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function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
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function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
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function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic;
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function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
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function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
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function bool_to_ulogic_f(cond : boolean) return std_ulogic;
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function bool_to_ulogic_f(cond : boolean) return std_ulogic;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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| Line 81... |
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function is_power_of_two_f(input : natural) return boolean;
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function is_power_of_two_f(input : natural) return boolean;
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function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
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function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
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-- Architecture Constants (do not modify!) ------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- native data path width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01050400"; -- no touchy!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant rf_r0_is_reg_c : boolean := true; -- x0 is a *physical register* that has to be initialized to zero by the CPU
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constant def_rst_val_c : std_ulogic := cond_sel_stdulogic_f(dedicated_reset_c, '0', '-');
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-- Internal Types -------------------------------------------------------------------------
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-- Internal Types -------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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type pmp_ctrl_if_t is array (0 to 63) of std_ulogic_vector(07 downto 0);
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type pmp_ctrl_if_t is array (0 to 63) of std_ulogic_vector(07 downto 0);
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type pmp_addr_if_t is array (0 to 63) of std_ulogic_vector(33 downto 0);
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type pmp_addr_if_t is array (0 to 63) of std_ulogic_vector(33 downto 0);
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type cp_data_if_t is array (0 to 7) of std_ulogic_vector(data_width_c-1 downto 0);
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type cp_data_if_t is array (0 to 7) of std_ulogic_vector(data_width_c-1 downto 0);
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constant imem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := ispace_base_c; -- internal instruction memory base address
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constant imem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := ispace_base_c; -- internal instruction memory base address
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constant dmem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := dspace_base_c; -- internal data memory base address
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constant dmem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := dspace_base_c; -- internal data memory base address
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--> internal data/instruction memory sizes are configured via top's generics
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--> internal data/instruction memory sizes are configured via top's generics
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-- Internal Bootloader ROM --
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-- Internal Bootloader ROM --
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constant boot_rom_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFF0000"; -- bootloader base address, fixed!
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constant boot_rom_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffff0000"; -- bootloader base address, fixed!
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constant boot_rom_size_c : natural := 4*1024; -- module's address space in bytes
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constant boot_rom_size_c : natural := 4*1024; -- module's address space in bytes
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constant boot_rom_max_size_c : natural := 32*1024; -- max module's address space in bytes, fixed!
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constant boot_rom_max_size_c : natural := 32*1024; -- max module's address space in bytes, fixed!
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-- IO: Peripheral Devices ("IO") Area --
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-- IO: Peripheral Devices ("IO") Area --
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-- Control register(s) (including the device-enable) should be located at the base address of each device
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-- Control register(s) (including the device-enable) should be located at the base address of each device
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constant io_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF00";
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constant io_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00";
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constant io_size_c : natural := 64*4; -- module's address space in bytes, fixed!
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constant io_size_c : natural := 64*4; -- module's address space in bytes, fixed!
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-- Custom Functions Subsystem (CFS) --
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-- Custom Functions Subsystem (CFS) --
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constant cfs_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF00"; -- base address
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constant cfs_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00"; -- base address
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constant cfs_size_c : natural := 32*4; -- module's address space in bytes
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constant cfs_size_c : natural := 32*4; -- module's address space in bytes
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constant cfs_reg0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF00";
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constant cfs_reg0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00";
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constant cfs_reg1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF04";
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constant cfs_reg1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff04";
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constant cfs_reg2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF08";
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constant cfs_reg2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff08";
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constant cfs_reg3_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF0C";
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constant cfs_reg3_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff0c";
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constant cfs_reg4_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF10";
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constant cfs_reg4_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff10";
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constant cfs_reg5_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF14";
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constant cfs_reg5_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff14";
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constant cfs_reg6_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF18";
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constant cfs_reg6_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff18";
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constant cfs_reg7_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF1C";
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constant cfs_reg7_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff1c";
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constant cfs_reg8_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF20";
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constant cfs_reg8_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff20";
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constant cfs_reg9_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF24";
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constant cfs_reg9_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff24";
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constant cfs_reg10_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF28";
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constant cfs_reg10_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff28";
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constant cfs_reg11_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF2C";
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constant cfs_reg11_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff2c";
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constant cfs_reg12_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF30";
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constant cfs_reg12_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff30";
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constant cfs_reg13_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF34";
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constant cfs_reg13_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff34";
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constant cfs_reg14_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF38";
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constant cfs_reg14_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff38";
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constant cfs_reg15_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF3C";
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constant cfs_reg15_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff3c";
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constant cfs_reg16_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF40";
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constant cfs_reg16_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff40";
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constant cfs_reg17_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF44";
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constant cfs_reg17_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff44";
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constant cfs_reg18_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF48";
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constant cfs_reg18_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff48";
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constant cfs_reg19_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF4C";
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constant cfs_reg19_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff4c";
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constant cfs_reg20_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF50";
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constant cfs_reg20_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff50";
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constant cfs_reg21_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF54";
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constant cfs_reg21_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff54";
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constant cfs_reg22_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF58";
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constant cfs_reg22_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff58";
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constant cfs_reg23_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF5C";
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constant cfs_reg23_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff5c";
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constant cfs_reg24_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF60";
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constant cfs_reg24_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff60";
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constant cfs_reg25_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF64";
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constant cfs_reg25_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff64";
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constant cfs_reg26_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF68";
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constant cfs_reg26_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff68";
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constant cfs_reg27_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF6C";
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constant cfs_reg27_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff6c";
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constant cfs_reg28_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF70";
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constant cfs_reg28_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff70";
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constant cfs_reg29_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF74";
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constant cfs_reg29_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff74";
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constant cfs_reg30_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF78";
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constant cfs_reg30_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff78";
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constant cfs_reg31_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF7C";
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constant cfs_reg31_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff7c";
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|
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-- General Purpose Input/Output Unit (GPIO) --
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-- General Purpose Input/Output Unit (GPIO) --
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constant gpio_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF80"; -- base address
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constant gpio_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80"; -- base address
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constant gpio_size_c : natural := 2*4; -- module's address space in bytes
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constant gpio_size_c : natural := 2*4; -- module's address space in bytes
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constant gpio_in_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF80";
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constant gpio_in_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80";
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constant gpio_out_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF84";
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constant gpio_out_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff84";
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-- True Random Number Generator (TRNG) --
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-- True Random Number Generator (TRNG) --
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constant trng_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF88"; -- base address
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constant trng_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff88"; -- base address
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constant trng_size_c : natural := 1*4; -- module's address space in bytes
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constant trng_size_c : natural := 1*4; -- module's address space in bytes
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constant trng_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF88";
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constant trng_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff88";
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-- Watch Dog Timer (WDT) --
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-- Watch Dog Timer (WDT) --
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constant wdt_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF8C"; -- base address
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constant wdt_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff8c"; -- base address
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constant wdt_size_c : natural := 1*4; -- module's address space in bytes
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constant wdt_size_c : natural := 1*4; -- module's address space in bytes
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constant wdt_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF8C";
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constant wdt_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff8c";
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-- Machine System Timer (MTIME) --
|
-- Machine System Timer (MTIME) --
|
constant mtime_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF90"; -- base address
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constant mtime_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff90"; -- base address
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constant mtime_size_c : natural := 4*4; -- module's address space in bytes
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constant mtime_size_c : natural := 4*4; -- module's address space in bytes
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constant mtime_time_lo_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF90";
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constant mtime_time_lo_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff90";
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constant mtime_time_hi_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF94";
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constant mtime_time_hi_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff94";
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constant mtime_cmp_lo_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF98";
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constant mtime_cmp_lo_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff98";
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constant mtime_cmp_hi_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFF9C";
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constant mtime_cmp_hi_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff9c";
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-- Universal Asynchronous Receiver/Transmitter 0 (UART0), primary UART --
|
-- Universal Asynchronous Receiver/Transmitter 0 (UART0), primary UART --
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constant uart0_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFA0"; -- base address
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constant uart0_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffa0"; -- base address
|
constant uart0_size_c : natural := 2*4; -- module's address space in bytes
|
constant uart0_size_c : natural := 2*4; -- module's address space in bytes
|
constant uart0_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFA0";
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constant uart0_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffa0";
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constant uart0_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFA4";
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constant uart0_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffa4";
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-- Serial Peripheral Interface (SPI) --
|
-- Serial Peripheral Interface (SPI) --
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constant spi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFA8"; -- base address
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constant spi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffa8"; -- base address
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constant spi_size_c : natural := 2*4; -- module's address space in bytes
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constant spi_size_c : natural := 2*4; -- module's address space in bytes
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constant spi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFA8";
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constant spi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffa8";
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constant spi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFAC";
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constant spi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffac";
|
|
|
-- Two Wire Interface (TWI) --
|
-- Two Wire Interface (TWI) --
|
constant twi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFB0"; -- base address
|
constant twi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0"; -- base address
|
constant twi_size_c : natural := 2*4; -- module's address space in bytes
|
constant twi_size_c : natural := 2*4; -- module's address space in bytes
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constant twi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFB0";
|
constant twi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0";
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constant twi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFB4";
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constant twi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb4";
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|
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-- Pulse-Width Modulation Controller (PWM) --
|
-- Pulse-Width Modulation Controller (PWM) --
|
constant pwm_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFB8"; -- base address
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constant pwm_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb8"; -- base address
|
constant pwm_size_c : natural := 2*4; -- module's address space in bytes
|
constant pwm_size_c : natural := 2*4; -- module's address space in bytes
|
constant pwm_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFB8";
|
constant pwm_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb8";
|
constant pwm_duty_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFBC";
|
constant pwm_duty_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffbc";
|
|
|
-- Numerically-Controlled Oscillator (NCO) --
|
-- Numerically-Controlled Oscillator (NCO) --
|
constant nco_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFC0"; -- base address
|
constant nco_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0"; -- base address
|
constant nco_size_c : natural := 4*4; -- module's address space in bytes
|
constant nco_size_c : natural := 4*4; -- module's address space in bytes
|
constant nco_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFC0";
|
constant nco_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0";
|
constant nco_ch0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFC4";
|
constant nco_ch0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc4";
|
constant nco_ch1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFC8";
|
constant nco_ch1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc8";
|
constant nco_ch2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFCC";
|
constant nco_ch2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffcc";
|
|
|
-- Universal Asynchronous Receiver/Transmitter 1 (UART1), secondary UART --
|
-- Universal Asynchronous Receiver/Transmitter 1 (UART1), secondary UART --
|
constant uart1_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFD0"; -- base address
|
constant uart1_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffd0"; -- base address
|
constant uart1_size_c : natural := 2*4; -- module's address space in bytes
|
constant uart1_size_c : natural := 2*4; -- module's address space in bytes
|
constant uart1_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFD0";
|
constant uart1_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffd0";
|
constant uart1_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFD4";
|
constant uart1_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffd4";
|
|
|
-- Smart LED (WS2811/WS2812) Interface (NEOLED) --
|
-- Smart LED (WS2811/WS2812) Interface (NEOLED) --
|
constant neoled_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFD8"; -- base address
|
constant neoled_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffd8"; -- base address
|
constant neoled_size_c : natural := 2*4; -- module's address space in bytes
|
constant neoled_size_c : natural := 2*4; -- module's address space in bytes
|
constant neoled_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFD8";
|
constant neoled_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffd8";
|
constant neoled_data_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFDC";
|
constant neoled_data_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffdc";
|
|
|
-- System Information Memory (SYSINFO) --
|
-- System Information Memory (SYSINFO) --
|
constant sysinfo_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"FFFFFFE0"; -- base address
|
constant sysinfo_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffe0"; -- base address
|
constant sysinfo_size_c : natural := 8*4; -- module's address space in bytes
|
constant sysinfo_size_c : natural := 8*4; -- module's address space in bytes
|
|
|
-- Main Control Bus -----------------------------------------------------------------------
|
-- Main Control Bus -----------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- register file --
|
-- register file --
|
| Line 261... |
Line 264... |
constant ctrl_bus_fence_c : natural := 39; -- executed fence operation
|
constant ctrl_bus_fence_c : natural := 39; -- executed fence operation
|
constant ctrl_bus_fencei_c : natural := 40; -- executed fencei operation
|
constant ctrl_bus_fencei_c : natural := 40; -- executed fencei operation
|
constant ctrl_bus_excl_c : natural := 41; -- exclusive bus access
|
constant ctrl_bus_excl_c : natural := 41; -- exclusive bus access
|
-- co-processors --
|
-- co-processors --
|
constant ctrl_cp_id_lsb_c : natural := 42; -- cp select ID lsb
|
constant ctrl_cp_id_lsb_c : natural := 42; -- cp select ID lsb
|
constant ctrl_cp_id_hsb_c : natural := 43; -- cp select ID hsb
|
constant ctrl_cp_id_hsb_c : natural := 43; -- cp select ID
|
constant ctrl_cp_id_msb_c : natural := 44; -- cp select ID msb
|
constant ctrl_cp_id_msb_c : natural := 44; -- cp select ID msb
|
-- current privilege level --
|
-- current privilege level --
|
constant ctrl_priv_lvl_lsb_c : natural := 45; -- privilege level lsb
|
constant ctrl_priv_lvl_lsb_c : natural := 45; -- privilege level lsb
|
constant ctrl_priv_lvl_msb_c : natural := 46; -- privilege level msb
|
constant ctrl_priv_lvl_msb_c : natural := 46; -- privilege level msb
|
-- instruction's control blocks (used by cpu co-processors) --
|
-- instruction's control blocks (used by cpu co-processors) --
|
| Line 436... |
Line 439... |
constant fp_single_pos_zero_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- positive zero
|
constant fp_single_pos_zero_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- positive zero
|
constant fp_single_neg_zero_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- negative zero
|
constant fp_single_neg_zero_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- negative zero
|
|
|
-- RISC-V CSR Addresses -------------------------------------------------------------------
|
-- RISC-V CSR Addresses -------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- read/write CSRs --
|
-- <<< standard read/write CSRs >>> --
|
|
-- user floating-point CSRs --
|
constant csr_class_float_c : std_ulogic_vector(07 downto 0) := x"00"; -- floating point
|
constant csr_class_float_c : std_ulogic_vector(07 downto 0) := x"00"; -- floating point
|
constant csr_fflags_c : std_ulogic_vector(11 downto 0) := x"001";
|
constant csr_fflags_c : std_ulogic_vector(11 downto 0) := x"001";
|
constant csr_frm_c : std_ulogic_vector(11 downto 0) := x"002";
|
constant csr_frm_c : std_ulogic_vector(11 downto 0) := x"002";
|
constant csr_fcsr_c : std_ulogic_vector(11 downto 0) := x"003";
|
constant csr_fcsr_c : std_ulogic_vector(11 downto 0) := x"003";
|
--
|
-- machine trap setup --
|
constant csr_setup_c : std_ulogic_vector(07 downto 0) := x"30"; -- trap setup
|
constant csr_class_setup_c : std_ulogic_vector(07 downto 0) := x"30"; -- trap setup
|
constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300";
|
constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300";
|
constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301";
|
constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301";
|
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
--
|
|
constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310";
|
constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310";
|
--
|
-- machine counter setup --
|
|
constant csr_cnt_setup_c : std_ulogic_vector(06 downto 0) := x"3" & "001"; -- counter setup
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
--
|
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
|
constant csr_mhpmevent5_c : std_ulogic_vector(11 downto 0) := x"325";
|
constant csr_mhpmevent5_c : std_ulogic_vector(11 downto 0) := x"325";
|
constant csr_mhpmevent6_c : std_ulogic_vector(11 downto 0) := x"326";
|
constant csr_mhpmevent6_c : std_ulogic_vector(11 downto 0) := x"326";
|
constant csr_mhpmevent7_c : std_ulogic_vector(11 downto 0) := x"327";
|
constant csr_mhpmevent7_c : std_ulogic_vector(11 downto 0) := x"327";
|
| Line 482... |
Line 485... |
constant csr_mhpmevent27_c : std_ulogic_vector(11 downto 0) := x"33b";
|
constant csr_mhpmevent27_c : std_ulogic_vector(11 downto 0) := x"33b";
|
constant csr_mhpmevent28_c : std_ulogic_vector(11 downto 0) := x"33c";
|
constant csr_mhpmevent28_c : std_ulogic_vector(11 downto 0) := x"33c";
|
constant csr_mhpmevent29_c : std_ulogic_vector(11 downto 0) := x"33d";
|
constant csr_mhpmevent29_c : std_ulogic_vector(11 downto 0) := x"33d";
|
constant csr_mhpmevent30_c : std_ulogic_vector(11 downto 0) := x"33e";
|
constant csr_mhpmevent30_c : std_ulogic_vector(11 downto 0) := x"33e";
|
constant csr_mhpmevent31_c : std_ulogic_vector(11 downto 0) := x"33f";
|
constant csr_mhpmevent31_c : std_ulogic_vector(11 downto 0) := x"33f";
|
--
|
-- machine trap handling --
|
constant csr_class_trap_c : std_ulogic_vector(07 downto 0) := x"34"; -- machine trap handling
|
constant csr_class_trap_c : std_ulogic_vector(07 downto 0) := x"34"; -- machine trap handling
|
constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340";
|
constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340";
|
constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341";
|
constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341";
|
constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342";
|
constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342";
|
constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343";
|
constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343";
|
constant csr_mip_c : std_ulogic_vector(11 downto 0) := x"344";
|
constant csr_mip_c : std_ulogic_vector(11 downto 0) := x"344";
|
--
|
-- physical memory protection - configuration --
|
constant csr_class_pmpcfg_c : std_ulogic_vector(07 downto 0) := x"3a"; -- pmp configuration
|
constant csr_class_pmpcfg_c : std_ulogic_vector(07 downto 0) := x"3a"; -- pmp configuration
|
constant csr_pmpcfg0_c : std_ulogic_vector(11 downto 0) := x"3a0";
|
constant csr_pmpcfg0_c : std_ulogic_vector(11 downto 0) := x"3a0";
|
constant csr_pmpcfg1_c : std_ulogic_vector(11 downto 0) := x"3a1";
|
constant csr_pmpcfg1_c : std_ulogic_vector(11 downto 0) := x"3a1";
|
constant csr_pmpcfg2_c : std_ulogic_vector(11 downto 0) := x"3a2";
|
constant csr_pmpcfg2_c : std_ulogic_vector(11 downto 0) := x"3a2";
|
constant csr_pmpcfg3_c : std_ulogic_vector(11 downto 0) := x"3a3";
|
constant csr_pmpcfg3_c : std_ulogic_vector(11 downto 0) := x"3a3";
|
| Line 507... |
Line 510... |
constant csr_pmpcfg11_c : std_ulogic_vector(11 downto 0) := x"3ab";
|
constant csr_pmpcfg11_c : std_ulogic_vector(11 downto 0) := x"3ab";
|
constant csr_pmpcfg12_c : std_ulogic_vector(11 downto 0) := x"3ac";
|
constant csr_pmpcfg12_c : std_ulogic_vector(11 downto 0) := x"3ac";
|
constant csr_pmpcfg13_c : std_ulogic_vector(11 downto 0) := x"3ad";
|
constant csr_pmpcfg13_c : std_ulogic_vector(11 downto 0) := x"3ad";
|
constant csr_pmpcfg14_c : std_ulogic_vector(11 downto 0) := x"3ae";
|
constant csr_pmpcfg14_c : std_ulogic_vector(11 downto 0) := x"3ae";
|
constant csr_pmpcfg15_c : std_ulogic_vector(11 downto 0) := x"3af";
|
constant csr_pmpcfg15_c : std_ulogic_vector(11 downto 0) := x"3af";
|
--
|
-- physical memory protection - address --
|
constant csr_pmpaddr0_c : std_ulogic_vector(11 downto 0) := x"3b0";
|
constant csr_pmpaddr0_c : std_ulogic_vector(11 downto 0) := x"3b0";
|
constant csr_pmpaddr1_c : std_ulogic_vector(11 downto 0) := x"3b1";
|
constant csr_pmpaddr1_c : std_ulogic_vector(11 downto 0) := x"3b1";
|
constant csr_pmpaddr2_c : std_ulogic_vector(11 downto 0) := x"3b2";
|
constant csr_pmpaddr2_c : std_ulogic_vector(11 downto 0) := x"3b2";
|
constant csr_pmpaddr3_c : std_ulogic_vector(11 downto 0) := x"3b3";
|
constant csr_pmpaddr3_c : std_ulogic_vector(11 downto 0) := x"3b3";
|
constant csr_pmpaddr4_c : std_ulogic_vector(11 downto 0) := x"3b4";
|
constant csr_pmpaddr4_c : std_ulogic_vector(11 downto 0) := x"3b4";
|
| Line 572... |
Line 575... |
constant csr_pmpaddr59_c : std_ulogic_vector(11 downto 0) := x"3eb";
|
constant csr_pmpaddr59_c : std_ulogic_vector(11 downto 0) := x"3eb";
|
constant csr_pmpaddr60_c : std_ulogic_vector(11 downto 0) := x"3ec";
|
constant csr_pmpaddr60_c : std_ulogic_vector(11 downto 0) := x"3ec";
|
constant csr_pmpaddr61_c : std_ulogic_vector(11 downto 0) := x"3ed";
|
constant csr_pmpaddr61_c : std_ulogic_vector(11 downto 0) := x"3ed";
|
constant csr_pmpaddr62_c : std_ulogic_vector(11 downto 0) := x"3ee";
|
constant csr_pmpaddr62_c : std_ulogic_vector(11 downto 0) := x"3ee";
|
constant csr_pmpaddr63_c : std_ulogic_vector(11 downto 0) := x"3ef";
|
constant csr_pmpaddr63_c : std_ulogic_vector(11 downto 0) := x"3ef";
|
--
|
-- machine counters/timers --
|
constant csr_mcycle_c : std_ulogic_vector(11 downto 0) := x"b00";
|
constant csr_mcycle_c : std_ulogic_vector(11 downto 0) := x"b00";
|
constant csr_minstret_c : std_ulogic_vector(11 downto 0) := x"b02";
|
constant csr_minstret_c : std_ulogic_vector(11 downto 0) := x"b02";
|
--
|
--
|
constant csr_mhpmcounter3_c : std_ulogic_vector(11 downto 0) := x"b03";
|
constant csr_mhpmcounter3_c : std_ulogic_vector(11 downto 0) := x"b03";
|
constant csr_mhpmcounter4_c : std_ulogic_vector(11 downto 0) := x"b04";
|
constant csr_mhpmcounter4_c : std_ulogic_vector(11 downto 0) := x"b04";
|
| Line 639... |
Line 642... |
constant csr_mhpmcounter28h_c : std_ulogic_vector(11 downto 0) := x"b9c";
|
constant csr_mhpmcounter28h_c : std_ulogic_vector(11 downto 0) := x"b9c";
|
constant csr_mhpmcounter29h_c : std_ulogic_vector(11 downto 0) := x"b9d";
|
constant csr_mhpmcounter29h_c : std_ulogic_vector(11 downto 0) := x"b9d";
|
constant csr_mhpmcounter30h_c : std_ulogic_vector(11 downto 0) := x"b9e";
|
constant csr_mhpmcounter30h_c : std_ulogic_vector(11 downto 0) := x"b9e";
|
constant csr_mhpmcounter31h_c : std_ulogic_vector(11 downto 0) := x"b9f";
|
constant csr_mhpmcounter31h_c : std_ulogic_vector(11 downto 0) := x"b9f";
|
|
|
-- read-only CSRs --
|
-- <<< standard read-only CSRs >>> --
|
|
-- user counters/timers --
|
constant csr_cycle_c : std_ulogic_vector(11 downto 0) := x"c00";
|
constant csr_cycle_c : std_ulogic_vector(11 downto 0) := x"c00";
|
constant csr_time_c : std_ulogic_vector(11 downto 0) := x"c01";
|
constant csr_time_c : std_ulogic_vector(11 downto 0) := x"c01";
|
constant csr_instret_c : std_ulogic_vector(11 downto 0) := x"c02";
|
constant csr_instret_c : std_ulogic_vector(11 downto 0) := x"c02";
|
--
|
--
|
constant csr_hpmcounter3_c : std_ulogic_vector(11 downto 0) := x"c03";
|
constant csr_hpmcounter3_c : std_ulogic_vector(11 downto 0) := x"c03";
|
| Line 707... |
Line 711... |
constant csr_hpmcounter27h_c : std_ulogic_vector(11 downto 0) := x"c9b";
|
constant csr_hpmcounter27h_c : std_ulogic_vector(11 downto 0) := x"c9b";
|
constant csr_hpmcounter28h_c : std_ulogic_vector(11 downto 0) := x"c9c";
|
constant csr_hpmcounter28h_c : std_ulogic_vector(11 downto 0) := x"c9c";
|
constant csr_hpmcounter29h_c : std_ulogic_vector(11 downto 0) := x"c9d";
|
constant csr_hpmcounter29h_c : std_ulogic_vector(11 downto 0) := x"c9d";
|
constant csr_hpmcounter30h_c : std_ulogic_vector(11 downto 0) := x"c9e";
|
constant csr_hpmcounter30h_c : std_ulogic_vector(11 downto 0) := x"c9e";
|
constant csr_hpmcounter31h_c : std_ulogic_vector(11 downto 0) := x"c9f";
|
constant csr_hpmcounter31h_c : std_ulogic_vector(11 downto 0) := x"c9f";
|
--
|
-- machine information registers --
|
constant csr_mvendorid_c : std_ulogic_vector(11 downto 0) := x"f11";
|
constant csr_mvendorid_c : std_ulogic_vector(11 downto 0) := x"f11";
|
constant csr_marchid_c : std_ulogic_vector(11 downto 0) := x"f12";
|
constant csr_marchid_c : std_ulogic_vector(11 downto 0) := x"f12";
|
constant csr_mimpid_c : std_ulogic_vector(11 downto 0) := x"f13";
|
constant csr_mimpid_c : std_ulogic_vector(11 downto 0) := x"f13";
|
constant csr_mhartid_c : std_ulogic_vector(11 downto 0) := x"f14";
|
constant csr_mhartid_c : std_ulogic_vector(11 downto 0) := x"f14";
|
|
-- <<< custom (NEORV32-specific) read-only CSRs >>> --
|
-- custom read-only CSRs --
|
|
constant csr_mzext_c : std_ulogic_vector(11 downto 0) := x"fc0";
|
constant csr_mzext_c : std_ulogic_vector(11 downto 0) := x"fc0";
|
|
|
-- Co-Processor IDs -----------------------------------------------------------------------
|
-- Co-Processor IDs -----------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant cp_sel_muldiv_c : std_ulogic_vector(2 downto 0) := "000"; -- multiplication/division operations ('M' extension)
|
constant cp_sel_muldiv_c : std_ulogic_vector(2 downto 0) := "000"; -- multiplication/division operations ('M' extension)
|
| Line 761... |
Line 764... |
-- RISC-V compliant interrupts (async. exceptions) --
|
-- RISC-V compliant interrupts (async. exceptions) --
|
constant trap_msi_c : std_ulogic_vector(5 downto 0) := "1" & "00011"; -- 1.3: machine software interrupt
|
constant trap_msi_c : std_ulogic_vector(5 downto 0) := "1" & "00011"; -- 1.3: machine software interrupt
|
constant trap_mti_c : std_ulogic_vector(5 downto 0) := "1" & "00111"; -- 1.7: machine timer interrupt
|
constant trap_mti_c : std_ulogic_vector(5 downto 0) := "1" & "00111"; -- 1.7: machine timer interrupt
|
constant trap_mei_c : std_ulogic_vector(5 downto 0) := "1" & "01011"; -- 1.11: machine external interrupt
|
constant trap_mei_c : std_ulogic_vector(5 downto 0) := "1" & "01011"; -- 1.11: machine external interrupt
|
-- NEORV32-specific (custom) interrupts (async. exceptions) --
|
-- NEORV32-specific (custom) interrupts (async. exceptions) --
|
constant trap_reset_c : std_ulogic_vector(5 downto 0) := "1" & "00000"; -- 1.0: hardware reset
|
|
constant trap_firq0_c : std_ulogic_vector(5 downto 0) := "1" & "10000"; -- 1.16: fast interrupt 0
|
constant trap_firq0_c : std_ulogic_vector(5 downto 0) := "1" & "10000"; -- 1.16: fast interrupt 0
|
constant trap_firq1_c : std_ulogic_vector(5 downto 0) := "1" & "10001"; -- 1.17: fast interrupt 1
|
constant trap_firq1_c : std_ulogic_vector(5 downto 0) := "1" & "10001"; -- 1.17: fast interrupt 1
|
constant trap_firq2_c : std_ulogic_vector(5 downto 0) := "1" & "10010"; -- 1.18: fast interrupt 2
|
constant trap_firq2_c : std_ulogic_vector(5 downto 0) := "1" & "10010"; -- 1.18: fast interrupt 2
|
constant trap_firq3_c : std_ulogic_vector(5 downto 0) := "1" & "10011"; -- 1.19: fast interrupt 3
|
constant trap_firq3_c : std_ulogic_vector(5 downto 0) := "1" & "10011"; -- 1.19: fast interrupt 3
|
constant trap_firq4_c : std_ulogic_vector(5 downto 0) := "1" & "10100"; -- 1.20: fast interrupt 4
|
constant trap_firq4_c : std_ulogic_vector(5 downto 0) := "1" & "10100"; -- 1.20: fast interrupt 4
|
| Line 825... |
Line 827... |
constant priv_mode_u_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
|
constant priv_mode_u_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
|
|
|
-- HPM Event System -----------------------------------------------------------------------
|
-- HPM Event System -----------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant hpmcnt_event_cy_c : natural := 0; -- Active cycle
|
constant hpmcnt_event_cy_c : natural := 0; -- Active cycle
|
constant hpmcnt_event_never_c : natural := 1;
|
constant hpmcnt_event_never_c : natural := 1; -- Unused / never (actually, this would be used for TIME)
|
constant hpmcnt_event_ir_c : natural := 2; -- Retired instruction
|
constant hpmcnt_event_ir_c : natural := 2; -- Retired instruction
|
constant hpmcnt_event_cir_c : natural := 3; -- Retired compressed instruction
|
constant hpmcnt_event_cir_c : natural := 3; -- Retired compressed instruction
|
constant hpmcnt_event_wait_if_c : natural := 4; -- Instruction fetch memory wait cycle
|
constant hpmcnt_event_wait_if_c : natural := 4; -- Instruction fetch memory wait cycle
|
constant hpmcnt_event_wait_ii_c : natural := 5; -- Instruction issue wait cycle
|
constant hpmcnt_event_wait_ii_c : natural := 5; -- Instruction issue wait cycle
|
constant hpmcnt_event_wait_mc_c : natural := 6; -- Multi-cycle ALU-operation wait cycle
|
constant hpmcnt_event_wait_mc_c : natural := 6; -- Multi-cycle ALU-operation wait cycle
|
| Line 875... |
Line 877... |
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
-- Extension Options --
|
-- Extension Options --
|
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
|
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
|
FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
|
FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
|
|
TINY_SHIFT_EN : boolean := false; -- use tiny (single-bit) shifter for shift operations
|
|
CPU_CNT_WIDTH : natural := 64; -- total width of CPU cycle and instret counters (0..64)
|
-- Physical Memory Protection (PMP) --
|
-- Physical Memory Protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
|
HPM_CNT_WIDTH : natural := 40; -- total size of HPM counters (1..64)
|
-- Internal Instruction memory --
|
-- Internal Instruction memory --
|
MEM_INT_IMEM_EN : boolean := true; -- implement processor-internal instruction memory
|
MEM_INT_IMEM_EN : boolean := true; -- implement processor-internal instruction memory
|
MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
|
MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
|
MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
|
MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
|
-- Internal Data memory --
|
-- Internal Data memory --
|
| Line 905... |
Line 910... |
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0); -- custom CFS configuration generic
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
|
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
|
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
|
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits
|
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits
|
IO_NCO_EN : boolean := true; -- implement numerically-controlled oscillator (NCO)?
|
IO_NCO_EN : boolean := true; -- implement numerically-controlled oscillator (NCO)?
|
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
);
|
);
|
| Line 991... |
Line 996... |
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
-- Extension Options --
|
-- Extension Options --
|
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
|
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
|
FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
|
FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
|
|
TINY_SHIFT_EN : boolean := false; -- use tiny (single-bit) shifter for shift operations
|
|
CPU_CNT_WIDTH : natural := 64; -- total width of CPU cycle and instret counters (0..64)
|
-- Physical Memory Protection (PMP) --
|
-- Physical Memory Protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0 -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (1..64)
|
);
|
);
|
port (
|
port (
|
-- global control --
|
-- global control --
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
| Line 1057... |
Line 1065... |
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
CPU_EXTENSION_RISCV_Zifencei : boolean := false; -- implement instruction stream sync.?
|
|
-- Extension Options --
|
|
CPU_CNT_WIDTH : natural := 64; -- total width of CPU cycle and instret counters (0..64)
|
-- Physical memory protection (PMP) --
|
-- Physical memory protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0 -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (1..64)
|
);
|
);
|
port (
|
port (
|
-- global control --
|
-- global control --
|
clk_i : in std_ulogic; -- global clock, rising edge
|
clk_i : in std_ulogic; -- global clock, rising edge
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
| Line 1133... |
Line 1144... |
-- Component: CPU ALU ---------------------------------------------------------------------
|
-- Component: CPU ALU ---------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
component neorv32_cpu_alu
|
component neorv32_cpu_alu
|
generic (
|
generic (
|
CPU_EXTENSION_RISCV_M : boolean := true; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M : boolean := true; -- implement muld/div extension?
|
FAST_SHIFT_EN : boolean := false -- use barrel shifter for shift operations
|
FAST_SHIFT_EN : boolean := false; -- use barrel shifter for shift operations
|
|
TINY_SHIFT_EN : boolean := false -- use tiny (single-bit) shifter for shift operations
|
);
|
);
|
port (
|
port (
|
-- global control --
|
-- global control --
|
clk_i : in std_ulogic; -- global clock, rising edge
|
clk_i : in std_ulogic; -- global clock, rising edge
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
| Line 1208... |
Line 1220... |
rstn_i : in std_ulogic; -- global reset, low-active, async
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
ctrl_i : in std_ulogic_vector(ctrl_width_c-1 downto 0); -- main control bus
|
ctrl_i : in std_ulogic_vector(ctrl_width_c-1 downto 0); -- main control bus
|
start_i : in std_ulogic; -- trigger operation
|
start_i : in std_ulogic; -- trigger operation
|
-- data input --
|
-- data input --
|
frm_i : in std_ulogic_vector(2 downto 0); -- rounding mode
|
frm_i : in std_ulogic_vector(2 downto 0); -- rounding mode
|
|
cmp_i : in std_ulogic_vector(1 downto 0); -- comparator status
|
rs1_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 1
|
rs1_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 1
|
rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
|
rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
|
-- result and status --
|
-- result and status --
|
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- operation result
|
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- operation result
|
fflags_o : out std_ulogic_vector(4 downto 0); -- exception flags
|
fflags_o : out std_ulogic_vector(4 downto 0); -- exception flags
|
| Line 1802... |
Line 1815... |
else
|
else
|
return val_f;
|
return val_f;
|
end if;
|
end if;
|
end function cond_sel_natural_f;
|
end function cond_sel_natural_f;
|
|
|
|
-- Function: Conditional select integer ---------------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer is
|
|
begin
|
|
if (cond = true) then
|
|
return val_t;
|
|
else
|
|
return val_f;
|
|
end if;
|
|
end function cond_sel_int_f;
|
|
|
-- Function: Conditional select std_ulogic_vector -----------------------------------------
|
-- Function: Conditional select std_ulogic_vector -----------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector is
|
function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector is
|
begin
|
begin
|
if (cond = true) then
|
if (cond = true) then
|
| Line 1813... |
Line 1837... |
else
|
else
|
return val_f;
|
return val_f;
|
end if;
|
end if;
|
end function cond_sel_stdulogicvector_f;
|
end function cond_sel_stdulogicvector_f;
|
|
|
|
-- Function: Conditional select std_ulogic ------------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic is
|
|
begin
|
|
if (cond = true) then
|
|
return val_t;
|
|
else
|
|
return val_f;
|
|
end if;
|
|
end function cond_sel_stdulogic_f;
|
|
|
-- Function: Conditional select string ----------------------------------------------------
|
-- Function: Conditional select string ----------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string is
|
function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string is
|
begin
|
begin
|
if (cond = true) then
|
if (cond = true) then
|
| Line 1840... |
Line 1875... |
-- Function: OR all bits ------------------------------------------------------------------
|
-- Function: OR all bits ------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function or_all_f(a : std_ulogic_vector) return std_ulogic is
|
function or_all_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := a(a'low);
|
tmp_v := '0';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low+1 to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v or a(i);
|
tmp_v := tmp_v or a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function or_all_f;
|
end function or_all_f;
|
| Line 1854... |
Line 1889... |
-- Function: AND all bits -----------------------------------------------------------------
|
-- Function: AND all bits -----------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function and_all_f(a : std_ulogic_vector) return std_ulogic is
|
function and_all_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := a(a'low);
|
tmp_v := '1';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low+1 to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v and a(i);
|
tmp_v := tmp_v and a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function and_all_f;
|
end function and_all_f;
|
| Line 1868... |
Line 1903... |
-- Function: XOR all bits -----------------------------------------------------------------
|
-- Function: XOR all bits -----------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function xor_all_f(a : std_ulogic_vector) return std_ulogic is
|
function xor_all_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := a(a'low);
|
tmp_v := '0';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low+1 to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v xor a(i);
|
tmp_v := tmp_v xor a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function xor_all_f;
|
end function xor_all_f;
|
| Line 1882... |
Line 1917... |
-- Function: XNOR all bits ----------------------------------------------------------------
|
-- Function: XNOR all bits ----------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function xnor_all_f(a : std_ulogic_vector) return std_ulogic is
|
function xnor_all_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := a(a'low);
|
tmp_v := '1';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low+1 to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v xnor a(i);
|
tmp_v := tmp_v xnor a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function xnor_all_f;
|
end function xnor_all_f;
|
