| Line 42... |
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- address space --
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-- address space --
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constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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|
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-- (external) bus interface --
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-- external bus interface --
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constant wb_pipe_mode_c : boolean := false; -- *external* bus protocol: false=classic/standard wishbone mode (default), true=pipelined wishbone mode
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constant wb_pipe_mode_c : boolean := false; -- external bus protocol: false=classic/standard wishbone mode (default), true=pipelined wishbone mode
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constant xbus_big_endian_c : boolean := true; -- external memory access byte order: true=big endian (default); false=little endian
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constant xbus_big_endian_c : boolean := false; -- external memory access byte order: true=big-endian, false=little-endian (default)
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|
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-- CPU core --
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-- CPU core --
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constant ipb_entries_c : natural := 4; -- entries in CPU instruction prefetch buffer, has to be a power of 2, default=2
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constant ipb_entries_c : natural := 4; -- entries in CPU instruction prefetch buffer, has to be a power of 2, default=2
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constant cp_timeout_en_c : boolean := false; -- auto-terminate pending co-processor operations after 256 cycles (for debugging only), default = false
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constant cp_timeout_en_c : boolean := false; -- auto-terminate pending co-processor operations after 256 cycles (for debugging only), default = false
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constant dedicated_reset_c : boolean := false; -- use dedicated hardware reset value for UNCRITICAL registers (FALSE=reset value is irrelevant (might simplify HW), default; TRUE=defined LOW reset value)
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constant dedicated_reset_c : boolean := false; -- use dedicated hardware reset value for UNCRITICAL registers (FALSE=reset value is irrelevant (might simplify HW), default; TRUE=defined LOW reset value)
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| Line 73... |
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function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer;
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function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer;
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function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
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function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
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function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic;
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function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic;
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function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
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function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
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function bool_to_ulogic_f(cond : boolean) return std_ulogic;
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function bool_to_ulogic_f(cond : boolean) return std_ulogic;
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function or_all_f(a : std_ulogic_vector) return std_ulogic;
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function or_reduce_f(a : std_ulogic_vector) return std_ulogic;
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function and_all_f(a : std_ulogic_vector) return std_ulogic;
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function and_reduce_f(a : std_ulogic_vector) return std_ulogic;
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function xor_all_f(a : std_ulogic_vector) return std_ulogic;
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function xor_reduce_f(a : std_ulogic_vector) return std_ulogic;
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function xnor_all_f(a : std_ulogic_vector) return std_ulogic;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
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function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
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function is_power_of_two_f(input : natural) return boolean;
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function is_power_of_two_f(input : natural) return boolean;
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function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
|
function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
|
|
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant data_width_c : natural := 32; -- native data path width - do not change!
|
constant data_width_c : natural := 32; -- native data path width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01050509"; -- no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01050605"; -- no touchy!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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constant rf_r0_is_reg_c : boolean := true; -- x0 is a *physical register* that has to be initialized to zero by the CPU
|
constant rf_r0_is_reg_c : boolean := true; -- x0 is a *physical register* that has to be initialized to zero by the CPU
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constant def_rst_val_c : std_ulogic := cond_sel_stdulogic_f(dedicated_reset_c, '0', '-');
|
constant def_rst_val_c : std_ulogic := cond_sel_stdulogic_f(dedicated_reset_c, '0', '-');
|
|
|
-- Internal Types -------------------------------------------------------------------------
|
-- Internal Types -------------------------------------------------------------------------
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| Line 119... |
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constant dm_data_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffff900";
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constant dm_data_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffff900";
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constant dm_sreg_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffff980";
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constant dm_sreg_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffff980";
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|
|
-- IO: Peripheral Devices ("IO") Area --
|
-- IO: Peripheral Devices ("IO") Area --
|
-- Control register(s) (including the device-enable) should be located at the base address of each device
|
-- Control register(s) (including the device-enable) should be located at the base address of each device
|
constant io_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00";
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constant io_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe00";
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constant io_size_c : natural := 64*4; -- module's address space in bytes, fixed!
|
constant io_size_c : natural := 512; -- module's address space in bytes, fixed!
|
|
|
-- Custom Functions Subsystem (CFS) --
|
-- Custom Functions Subsystem (CFS) --
|
constant cfs_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00"; -- base address
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constant cfs_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe00"; -- base address
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constant cfs_size_c : natural := 32*4; -- module's address space in bytes
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constant cfs_size_c : natural := 64*4; -- module's address space in bytes
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constant cfs_reg0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00";
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constant cfs_reg0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe00";
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constant cfs_reg1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff04";
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constant cfs_reg1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe04";
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constant cfs_reg2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff08";
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constant cfs_reg2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe08";
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constant cfs_reg3_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff0c";
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constant cfs_reg3_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe0c";
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constant cfs_reg4_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff10";
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constant cfs_reg4_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe10";
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constant cfs_reg5_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff14";
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constant cfs_reg5_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe14";
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constant cfs_reg6_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff18";
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constant cfs_reg6_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe18";
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constant cfs_reg7_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff1c";
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constant cfs_reg7_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe1c";
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constant cfs_reg8_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff20";
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constant cfs_reg8_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe20";
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constant cfs_reg9_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff24";
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constant cfs_reg9_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe24";
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constant cfs_reg10_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff28";
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constant cfs_reg10_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe28";
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constant cfs_reg11_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff2c";
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constant cfs_reg11_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe2c";
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constant cfs_reg12_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff30";
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constant cfs_reg12_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe30";
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constant cfs_reg13_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff34";
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constant cfs_reg13_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe34";
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constant cfs_reg14_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff38";
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constant cfs_reg14_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe38";
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constant cfs_reg15_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff3c";
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constant cfs_reg15_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe3c";
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constant cfs_reg16_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff40";
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constant cfs_reg16_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe40";
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constant cfs_reg17_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff44";
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constant cfs_reg17_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe44";
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constant cfs_reg18_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff48";
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constant cfs_reg18_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe48";
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constant cfs_reg19_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff4c";
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constant cfs_reg19_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe4c";
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constant cfs_reg20_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff50";
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constant cfs_reg20_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe50";
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constant cfs_reg21_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff54";
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constant cfs_reg21_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe54";
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constant cfs_reg22_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff58";
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constant cfs_reg22_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe58";
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constant cfs_reg23_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff5c";
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constant cfs_reg23_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe5c";
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constant cfs_reg24_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff60";
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constant cfs_reg24_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe60";
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constant cfs_reg25_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff64";
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constant cfs_reg25_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe64";
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constant cfs_reg26_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff68";
|
constant cfs_reg26_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe68";
|
constant cfs_reg27_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff6c";
|
constant cfs_reg27_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe6c";
|
constant cfs_reg28_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff70";
|
constant cfs_reg28_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe70";
|
constant cfs_reg29_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff74";
|
constant cfs_reg29_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe74";
|
constant cfs_reg30_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff78";
|
constant cfs_reg30_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe78";
|
constant cfs_reg31_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff7c";
|
constant cfs_reg31_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe7c";
|
|
|
|
-- Pulse-Width Modulation Controller (PWM) --
|
|
constant pwm_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe80"; -- base address
|
|
constant pwm_size_c : natural := 16*4; -- module's address space in bytes
|
|
constant pwm_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe80";
|
|
constant pwm_duty0_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe84";
|
|
constant pwm_duty1_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe88";
|
|
constant pwm_duty2_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe8c";
|
|
constant pwm_duty3_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe90";
|
|
constant pwm_duty4_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe94";
|
|
constant pwm_duty5_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe98";
|
|
constant pwm_duty6_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffe9c";
|
|
constant pwm_duty7_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffea0";
|
|
constant pwm_duty8_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffea4";
|
|
constant pwm_duty9_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffea8";
|
|
constant pwm_duty10_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffeac";
|
|
constant pwm_duty11_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffeb0";
|
|
constant pwm_duty12_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffeb4";
|
|
constant pwm_duty13_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffeb8";
|
|
constant pwm_duty14_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"fffffebc";
|
|
|
|
-- reserved --
|
|
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0"; -- base address
|
|
--constant reserved_size_c : natural := 16*4; -- module's address space in bytes
|
|
|
|
-- reserved --
|
|
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff00"; -- base address
|
|
--constant reserved_size_c : natural := 32*4; -- module's address space in bytes
|
|
|
-- General Purpose Input/Output Unit (GPIO) --
|
-- General Purpose Input/Output Unit (GPIO) --
|
constant gpio_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80"; -- base address
|
constant gpio_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80"; -- base address
|
constant gpio_size_c : natural := 2*4; -- module's address space in bytes
|
constant gpio_size_c : natural := 2*4; -- module's address space in bytes
|
constant gpio_in_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80";
|
constant gpio_in_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff80";
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| Line 200... |
Line 227... |
constant twi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0"; -- base address
|
constant twi_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0"; -- base address
|
constant twi_size_c : natural := 2*4; -- module's address space in bytes
|
constant twi_size_c : natural := 2*4; -- module's address space in bytes
|
constant twi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0";
|
constant twi_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb0";
|
constant twi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb4";
|
constant twi_rtx_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb4";
|
|
|
-- Pulse-Width Modulation Controller (PWM) --
|
-- reserved --
|
constant pwm_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb8"; -- base address
|
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb8"; -- base address
|
constant pwm_size_c : natural := 2*4; -- module's address space in bytes
|
--constant reserved_size_c : natural := 2*4; -- module's address space in bytes
|
constant pwm_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffb8";
|
|
constant pwm_duty_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffbc";
|
|
|
|
-- Numerically-Controlled Oscillator (NCO) --
|
-- Numerically-Controlled Oscillator (NCO) --
|
constant nco_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0"; -- base address
|
constant nco_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0"; -- base address
|
constant nco_size_c : natural := 4*4; -- module's address space in bytes
|
constant nco_size_c : natural := 4*4; -- module's address space in bytes
|
constant nco_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0";
|
constant nco_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffffc0";
|
| Line 471... |
Line 496... |
constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300";
|
constant csr_mstatus_c : std_ulogic_vector(11 downto 0) := x"300";
|
constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301";
|
constant csr_misa_c : std_ulogic_vector(11 downto 0) := x"301";
|
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310";
|
|
-- machine counter setup --
|
-- machine counter setup --
|
constant csr_cnt_setup_c : std_ulogic_vector(06 downto 0) := x"3" & "001"; -- counter setup
|
constant csr_cnt_setup_c : std_ulogic_vector(06 downto 0) := x"3" & "001"; -- counter setup
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
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| Line 747... |
Line 771... |
|
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-- Co-Processor IDs -----------------------------------------------------------------------
|
-- Co-Processor IDs -----------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant cp_sel_csr_rd_c : std_ulogic_vector(2 downto 0) := "000"; -- CSR read access ('Zicsr' extension)
|
constant cp_sel_csr_rd_c : std_ulogic_vector(2 downto 0) := "000"; -- CSR read access ('Zicsr' extension)
|
constant cp_sel_muldiv_c : std_ulogic_vector(2 downto 0) := "001"; -- multiplication/division operations ('M' extension)
|
constant cp_sel_muldiv_c : std_ulogic_vector(2 downto 0) := "001"; -- multiplication/division operations ('M' extension)
|
constant cp_sel_bitmanip_c : std_ulogic_vector(2 downto 0) := "010"; -- bit manipulation ('B' extension)
|
--constant cp_sel_bitmanip_c : std_ulogic_vector(2 downto 0) := "010"; -- bit manipulation ('B' extension)
|
constant cp_sel_fpu_c : std_ulogic_vector(2 downto 0) := "011"; -- floating-point unit ('Zfinx' extension)
|
constant cp_sel_fpu_c : std_ulogic_vector(2 downto 0) := "011"; -- floating-point unit ('Zfinx' extension)
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "100"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "100"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "101"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "101"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "110"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "110"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "111"; -- reserved
|
--constant cp_sel_reserved_c : std_ulogic_vector(2 downto 0) := "111"; -- reserved
|
| Line 767... |
Line 791... |
constant alu_logic_cmd_or_c : std_ulogic_vector(1 downto 0) := "10"; -- r.logic <= A or B
|
constant alu_logic_cmd_or_c : std_ulogic_vector(1 downto 0) := "10"; -- r.logic <= A or B
|
constant alu_logic_cmd_and_c : std_ulogic_vector(1 downto 0) := "11"; -- r.logic <= A and B
|
constant alu_logic_cmd_and_c : std_ulogic_vector(1 downto 0) := "11"; -- r.logic <= A and B
|
-- function select (actual alu result) --
|
-- function select (actual alu result) --
|
constant alu_func_cmd_arith_c : std_ulogic_vector(1 downto 0) := "00"; -- r <= r.arith
|
constant alu_func_cmd_arith_c : std_ulogic_vector(1 downto 0) := "00"; -- r <= r.arith
|
constant alu_func_cmd_logic_c : std_ulogic_vector(1 downto 0) := "01"; -- r <= r.logic
|
constant alu_func_cmd_logic_c : std_ulogic_vector(1 downto 0) := "01"; -- r <= r.logic
|
constant alu_func_cmd_shift_c : std_ulogic_vector(1 downto 0) := "10"; -- r <= A <</>> B (iterative)
|
constant alu_func_cmd_shift_c : std_ulogic_vector(1 downto 0) := "10"; -- r <= A <</>> B (multi-cycle)
|
constant alu_func_cmd_copro_c : std_ulogic_vector(1 downto 0) := "11"; -- r <= CP result (iterative)
|
constant alu_func_cmd_copro_c : std_ulogic_vector(1 downto 0) := "11"; -- r <= CP result (multi-cycle)
|
|
|
-- Trap ID Codes --------------------------------------------------------------------------
|
-- Trap ID Codes --------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- MSB : 1 = async exception (IRQ); 0 = sync exception (eg. ebreak)
|
-- MSB : 1 = async exception (IRQ); 0 = sync exception (e.g. ebreak)
|
-- MSB-1 : 1 = entry to debug mode; 0 = normal trapping
|
-- MSB-1 : 1 = entry to debug mode; 0 = normal trapping
|
-- RISC-V compliant sync. exceptions --
|
-- RISC-V compliant sync. exceptions --
|
constant trap_ima_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00000"; -- 0.0: instruction misaligned
|
constant trap_ima_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00000"; -- 0.0: instruction misaligned
|
constant trap_iba_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00001"; -- 0.1: instruction access fault
|
constant trap_iba_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00001"; -- 0.1: instruction access fault
|
constant trap_iil_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00010"; -- 0.2: illegal instruction
|
constant trap_iil_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00010"; -- 0.2: illegal instruction
|
| Line 905... |
Line 929... |
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
-- On-Chip Debugger (OCD) --
|
-- On-Chip Debugger (OCD) --
|
ON_CHIP_DEBUGGER_EN : boolean := false; -- implement on-chip debugger
|
ON_CHIP_DEBUGGER_EN : boolean := false; -- implement on-chip debugger
|
-- RISC-V CPU Extensions --
|
-- RISC-V CPU Extensions --
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_B : boolean := false; -- implement bit manipulation extensions?
|
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT regs!)
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT regs!)
|
| Line 923... |
Line 946... |
-- Physical Memory Protection (PMP) --
|
-- Physical Memory Protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_CNT_WIDTH : natural := 40; -- total size of HPM counters (1..64)
|
HPM_CNT_WIDTH : natural := 40; -- total size of HPM counters (0..64)
|
-- Internal Instruction memory --
|
-- Internal Instruction memory --
|
MEM_INT_IMEM_EN : boolean := true; -- implement processor-internal instruction memory
|
MEM_INT_IMEM_EN : boolean := true; -- implement processor-internal instruction memory
|
MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
|
MEM_INT_IMEM_SIZE : natural := 16*1024; -- size of processor-internal instruction memory in bytes
|
MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
|
MEM_INT_IMEM_ROM : boolean := false; -- implement processor-internal instruction memory as ROM
|
-- Internal Data memory --
|
-- Internal Data memory --
|
| Line 946... |
Line 969... |
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
IO_UART0_EN : boolean := true; -- implement primary universal asynchronous receiver/transmitter (UART0)?
|
IO_UART0_EN : boolean := true; -- implement primary universal asynchronous receiver/transmitter (UART0)?
|
IO_UART1_EN : boolean := true; -- implement secondary universal asynchronous receiver/transmitter (UART1)?
|
IO_UART1_EN : boolean := true; -- implement secondary universal asynchronous receiver/transmitter (UART1)?
|
IO_SPI_EN : boolean := true; -- implement serial peripheral interface (SPI)?
|
IO_SPI_EN : boolean := true; -- implement serial peripheral interface (SPI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_PWM_NUM_CH : natural := 4; -- number of PWM channels to implement (0..60); 0 = disabled
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
|
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
|
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
|
| Line 1002... |
Line 1025... |
spi_sdi_i : in std_ulogic := '0'; -- controller data in, peripheral data out
|
spi_sdi_i : in std_ulogic := '0'; -- controller data in, peripheral data out
|
spi_csn_o : out std_ulogic_vector(07 downto 0); -- SPI CS
|
spi_csn_o : out std_ulogic_vector(07 downto 0); -- SPI CS
|
-- TWI (available if IO_TWI_EN = true) --
|
-- TWI (available if IO_TWI_EN = true) --
|
twi_sda_io : inout std_logic; -- twi serial data line
|
twi_sda_io : inout std_logic; -- twi serial data line
|
twi_scl_io : inout std_logic; -- twi serial clock line
|
twi_scl_io : inout std_logic; -- twi serial clock line
|
-- PWM (available if IO_PWM_EN = true) --
|
-- PWM (available if IO_PWM_NUM_CH > 0) --
|
pwm_o : out std_ulogic_vector(03 downto 0); -- pwm channels
|
pwm_o : out std_ulogic_vector(IO_PWM_NUM_CH-1 downto 0); -- pwm channels
|
-- Custom Functions Subsystem IO --
|
-- Custom Functions Subsystem IO --
|
cfs_in_i : in std_ulogic_vector(IO_CFS_IN_SIZE-1 downto 0); -- custom CFS inputs conduit
|
cfs_in_i : in std_ulogic_vector(IO_CFS_IN_SIZE-1 downto 0); -- custom CFS inputs conduit
|
cfs_out_o : out std_ulogic_vector(IO_CFS_OUT_SIZE-1 downto 0); -- custom CFS outputs conduit
|
cfs_out_o : out std_ulogic_vector(IO_CFS_OUT_SIZE-1 downto 0); -- custom CFS outputs conduit
|
-- NCO output (available if IO_NCO_EN = true) --
|
-- NCO output (available if IO_NCO_EN = true) --
|
nco_o : out std_ulogic_vector(02 downto 0); -- numerically-controlled oscillator channels
|
nco_o : out std_ulogic_vector(02 downto 0); -- numerically-controlled oscillator channels
|
| Line 1033... |
Line 1056... |
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu boot address
|
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu boot address
|
CPU_DEBUG_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu debug mode start address
|
CPU_DEBUG_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu debug mode start address
|
-- RISC-V CPU Extensions --
|
-- RISC-V CPU Extensions --
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_B : boolean := false; -- implement bit manipulation extensions?
|
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
| Line 1052... |
Line 1074... |
-- Physical Memory Protection (PMP) --
|
-- Physical Memory Protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (1..64)
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (0..64)
|
);
|
);
|
port (
|
port (
|
-- global control --
|
-- global control --
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
| Line 1109... |
Line 1131... |
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
HW_THREAD_ID : natural := 0; -- hardware thread id (32-bit)
|
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu boot address
|
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu boot address
|
CPU_DEBUG_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu debug mode start address
|
CPU_DEBUG_ADDR : std_ulogic_vector(31 downto 0) := x"00000000"; -- cpu debug mode start address
|
-- RISC-V CPU Extensions --
|
-- RISC-V CPU Extensions --
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_A : boolean := false; -- implement atomic extension?
|
CPU_EXTENSION_RISCV_B : boolean := false; -- implement bit manipulation extensions?
|
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M : boolean := false; -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zfinx : boolean := false; -- implement 32-bit floating-point extension (using INT reg!)
|
| Line 1125... |
Line 1146... |
-- Physical memory protection (PMP) --
|
-- Physical memory protection (PMP) --
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_NUM_REGIONS : natural := 0; -- number of regions (0..64)
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
PMP_MIN_GRANULARITY : natural := 64*1024; -- minimal region granularity in bytes, has to be a power of 2, min 8 bytes
|
-- Hardware Performance Monitors (HPM) --
|
-- Hardware Performance Monitors (HPM) --
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_NUM_CNTS : natural := 0; -- number of implemented HPM counters (0..29)
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (1..64)
|
HPM_CNT_WIDTH : natural := 40 -- total size of HPM counters (0..64)
|
);
|
);
|
port (
|
port (
|
-- global control --
|
-- global control --
|
clk_i : in std_ulogic; -- global clock, rising edge
|
clk_i : in std_ulogic; -- global clock, rising edge
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
| Line 1248... |
Line 1269... |
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- operation result
|
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- operation result
|
valid_o : out std_ulogic -- data output valid
|
valid_o : out std_ulogic -- data output valid
|
);
|
);
|
end component;
|
end component;
|
|
|
-- Component: CPU Co-Processor Bit Manipulation ('B' extension) ---------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
component neorv32_cpu_cp_bitmanip
|
|
port (
|
|
-- global control --
|
|
clk_i : in std_ulogic; -- global clock, rising edge
|
|
rstn_i : in std_ulogic; -- global reset, low-active, async
|
|
ctrl_i : in std_ulogic_vector(ctrl_width_c-1 downto 0); -- main control bus
|
|
start_i : in std_ulogic; -- trigger operation
|
|
-- data input --
|
|
cmp_i : in std_ulogic_vector(1 downto 0); -- comparator status
|
|
rs1_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 1
|
|
rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
|
|
-- result and status --
|
|
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- operation result
|
|
valid_o : out std_ulogic -- data output valid
|
|
);
|
|
end component;
|
|
|
|
-- Component: CPU Co-Processor 32-bit FPU ('Zfinx' extension) -----------------------------
|
-- Component: CPU Co-Processor 32-bit FPU ('Zfinx' extension) -----------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
component neorv32_cpu_cp_fpu
|
component neorv32_cpu_cp_fpu
|
port (
|
port (
|
-- global control --
|
-- global control --
|
| Line 1529... |
Line 1531... |
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
component neorv32_mtime
|
component neorv32_mtime
|
port (
|
port (
|
-- host access --
|
-- host access --
|
clk_i : in std_ulogic; -- global clock line
|
clk_i : in std_ulogic; -- global clock line
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
|
addr_i : in std_ulogic_vector(31 downto 0); -- address
|
addr_i : in std_ulogic_vector(31 downto 0); -- address
|
rden_i : in std_ulogic; -- read enable
|
rden_i : in std_ulogic; -- read enable
|
wren_i : in std_ulogic; -- write enable
|
wren_i : in std_ulogic; -- write enable
|
data_i : in std_ulogic_vector(31 downto 0); -- data in
|
data_i : in std_ulogic_vector(31 downto 0); -- data in
|
data_o : out std_ulogic_vector(31 downto 0); -- data out
|
data_o : out std_ulogic_vector(31 downto 0); -- data out
|
| Line 1666... |
Line 1667... |
end component;
|
end component;
|
|
|
-- Component: Pulse-Width Modulation Controller (PWM) -------------------------------------
|
-- Component: Pulse-Width Modulation Controller (PWM) -------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
component neorv32_pwm
|
component neorv32_pwm
|
|
generic (
|
|
NUM_CHANNELS : natural := 4 -- number of PWM channels (0..60)
|
|
);
|
port (
|
port (
|
-- host access --
|
-- host access --
|
clk_i : in std_ulogic; -- global clock line
|
clk_i : in std_ulogic; -- global clock line
|
addr_i : in std_ulogic_vector(31 downto 0); -- address
|
addr_i : in std_ulogic_vector(31 downto 0); -- address
|
rden_i : in std_ulogic; -- read enable
|
rden_i : in std_ulogic; -- read enable
|
| Line 1679... |
Line 1683... |
ack_o : out std_ulogic; -- transfer acknowledge
|
ack_o : out std_ulogic; -- transfer acknowledge
|
-- clock generator --
|
-- clock generator --
|
clkgen_en_o : out std_ulogic; -- enable clock generator
|
clkgen_en_o : out std_ulogic; -- enable clock generator
|
clkgen_i : in std_ulogic_vector(07 downto 0);
|
clkgen_i : in std_ulogic_vector(07 downto 0);
|
-- pwm output channels --
|
-- pwm output channels --
|
pwm_o : out std_ulogic_vector(03 downto 0)
|
pwm_o : out std_ulogic_vector(NUM_CHANNELS-1 downto 0)
|
);
|
);
|
end component;
|
end component;
|
|
|
-- Component: True Random Number Generator (TRNG) -----------------------------------------
|
-- Component: True Random Number Generator (TRNG) -----------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
| Line 1848... |
Line 1852... |
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
IO_UART0_EN : boolean := true; -- implement primary universal asynchronous receiver/transmitter (UART0)?
|
IO_UART0_EN : boolean := true; -- implement primary universal asynchronous receiver/transmitter (UART0)?
|
IO_UART1_EN : boolean := true; -- implement secondary universal asynchronous receiver/transmitter (UART1)?
|
IO_UART1_EN : boolean := true; -- implement secondary universal asynchronous receiver/transmitter (UART1)?
|
IO_SPI_EN : boolean := true; -- implement serial peripheral interface (SPI)?
|
IO_SPI_EN : boolean := true; -- implement serial peripheral interface (SPI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_PWM_NUM_CH : natural := 4; -- number of PWM channels to implement
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_TRNG_EN : boolean := true; -- implement true random number generator (TRNG)?
|
IO_TRNG_EN : boolean := true; -- implement true random number generator (TRNG)?
|
IO_CFS_EN : boolean := true; -- implement custom functions subsystem (CFS)?
|
IO_CFS_EN : boolean := true; -- implement custom functions subsystem (CFS)?
|
IO_NCO_EN : boolean := true; -- implement numerically-controlled oscillator (NCO)?
|
IO_NCO_EN : boolean := true; -- implement numerically-controlled oscillator (NCO)?
|
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
| Line 2010... |
Line 2014... |
else
|
else
|
return '0';
|
return '0';
|
end if;
|
end if;
|
end function bool_to_ulogic_f;
|
end function bool_to_ulogic_f;
|
|
|
-- Function: OR all bits ------------------------------------------------------------------
|
-- Function: OR-reduce all bits -----------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function or_all_f(a : std_ulogic_vector) return std_ulogic is
|
function or_reduce_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := '0';
|
tmp_v := '0';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v or a(i);
|
tmp_v := tmp_v or a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function or_all_f;
|
end function or_reduce_f;
|
|
|
-- Function: AND all bits -----------------------------------------------------------------
|
-- Function: AND-reduce all bits ----------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function and_all_f(a : std_ulogic_vector) return std_ulogic is
|
function and_reduce_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := '1';
|
tmp_v := '1';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v and a(i);
|
tmp_v := tmp_v and a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function and_all_f;
|
end function and_reduce_f;
|
|
|
-- Function: XOR all bits -----------------------------------------------------------------
|
-- Function: XOR-reduce all bits ----------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function xor_all_f(a : std_ulogic_vector) return std_ulogic is
|
function xor_reduce_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
tmp_v := '0';
|
tmp_v := '0';
|
if (a'low < a'high) then -- not null range?
|
if (a'low < a'high) then -- not null range?
|
for i in a'low to a'high loop
|
for i in a'low to a'high loop
|
tmp_v := tmp_v xor a(i);
|
tmp_v := tmp_v xor a(i);
|
end loop; -- i
|
end loop; -- i
|
end if;
|
end if;
|
return tmp_v;
|
return tmp_v;
|
end function xor_all_f;
|
end function xor_reduce_f;
|
|
|
-- Function: XNOR all bits ----------------------------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
function xnor_all_f(a : std_ulogic_vector) return std_ulogic is
|
|
variable tmp_v : std_ulogic;
|
|
begin
|
|
tmp_v := '1';
|
|
if (a'low < a'high) then -- not null range?
|
|
for i in a'low to a'high loop
|
|
tmp_v := tmp_v xnor a(i);
|
|
end loop; -- i
|
|
end if;
|
|
return tmp_v;
|
|
end function xnor_all_f;
|
|
|
|
-- Function: Convert std_ulogic_vector to hex char ----------------------------------------
|
-- Function: Convert std_ulogic_vector to hex char ----------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character is
|
function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character is
|
variable output_v : character;
|
variable output_v : character;
|
