| Line 62... |
Line 62... |
constant jtag_tap_idcode_manid_c : std_ulogic_vector(10 downto 0) := "00000000000"; -- manufacturer id
|
constant jtag_tap_idcode_manid_c : std_ulogic_vector(10 downto 0) := "00000000000"; -- manufacturer id
|
|
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant data_width_c : natural := 32; -- native data path width - do not change!
|
constant data_width_c : natural := 32; -- native data path width - do not change!
|
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060000"; -- no touchy!
|
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060100"; -- no touchy!
|
constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
|
constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
|
|
|
-- External Interface Types ---------------------------------------------------------------
|
-- External Interface Types ---------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
type sdata_8x32_t is array (0 to 7) of std_ulogic_vector(31 downto 0);
|
type sdata_8x32_t is array (0 to 7) of std_ulogic_vector(31 downto 0);
|
| Line 115... |
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-- Internal Instruction Memory (IMEM) and Date Memory (DMEM) --
|
-- Internal Instruction Memory (IMEM) and Date Memory (DMEM) --
|
constant imem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := ispace_base_c; -- internal instruction memory base address
|
constant imem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := ispace_base_c; -- internal instruction memory base address
|
constant dmem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := dspace_base_c; -- internal data memory base address
|
constant dmem_base_c : std_ulogic_vector(data_width_c-1 downto 0) := dspace_base_c; -- internal data memory base address
|
--> internal data/instruction memory sizes are configured via top's generics
|
--> internal data/instruction memory sizes are configured via top's generics
|
|
|
|
-- !!! IMPORTANT: The base address of each component/module has to be aligned to the !!!
|
|
-- !!! total size of the module's occupied address space. The occupied address space !!!
|
|
-- !!! has to be a power of two (minimum 4 bytes). Address spaces must not overlap. !!!
|
|
|
-- Internal Bootloader ROM --
|
-- Internal Bootloader ROM --
|
-- Actual bootloader size is determined during runtime via the length of the bootloader initialization image
|
-- Actual bootloader size is determined during runtime via the length of the bootloader initialization image
|
constant boot_rom_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffff0000"; -- bootloader base address, fixed!
|
constant boot_rom_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffff0000"; -- bootloader base address, fixed!
|
constant boot_rom_max_size_c : natural := 32*1024; -- max module's address space size in bytes, fixed!
|
constant boot_rom_max_size_c : natural := 32*1024; -- max module's address space size in bytes, fixed!
|
|
|
| Line 525... |
Line 529... |
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mie_c : std_ulogic_vector(11 downto 0) := x"304";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mtvec_c : std_ulogic_vector(11 downto 0) := x"305";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
constant csr_mcounteren_c : std_ulogic_vector(11 downto 0) := x"306";
|
--
|
--
|
constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310";
|
constant csr_mstatush_c : std_ulogic_vector(11 downto 0) := x"310";
|
|
-- machine configuration --
|
|
constant csr_class_envcfg_c : std_ulogic_vector(06 downto 0) := x"3" & "000"; -- configuration
|
|
constant csr_menvcfg_c : std_ulogic_vector(11 downto 0) := x"30a";
|
|
constant csr_menvcfgh_c : std_ulogic_vector(11 downto 0) := x"31a";
|
-- machine counter setup --
|
-- machine counter setup --
|
constant csr_cnt_setup_c : std_ulogic_vector(06 downto 0) := x"3" & "001"; -- counter setup
|
constant csr_cnt_setup_c : std_ulogic_vector(06 downto 0) := x"3" & "001"; -- counter setup
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
constant csr_mcountinhibit_c : std_ulogic_vector(11 downto 0) := x"320";
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent3_c : std_ulogic_vector(11 downto 0) := x"323";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
|
constant csr_mhpmevent4_c : std_ulogic_vector(11 downto 0) := x"324";
|
| Line 558... |
Line 566... |
constant csr_mhpmevent28_c : std_ulogic_vector(11 downto 0) := x"33c";
|
constant csr_mhpmevent28_c : std_ulogic_vector(11 downto 0) := x"33c";
|
constant csr_mhpmevent29_c : std_ulogic_vector(11 downto 0) := x"33d";
|
constant csr_mhpmevent29_c : std_ulogic_vector(11 downto 0) := x"33d";
|
constant csr_mhpmevent30_c : std_ulogic_vector(11 downto 0) := x"33e";
|
constant csr_mhpmevent30_c : std_ulogic_vector(11 downto 0) := x"33e";
|
constant csr_mhpmevent31_c : std_ulogic_vector(11 downto 0) := x"33f";
|
constant csr_mhpmevent31_c : std_ulogic_vector(11 downto 0) := x"33f";
|
-- machine trap handling --
|
-- machine trap handling --
|
constant csr_class_trap_c : std_ulogic_vector(08 downto 0) := x"34" & '0'; -- machine trap handling
|
constant csr_class_trap_c : std_ulogic_vector(07 downto 0) := x"34"; -- machine trap handling
|
constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340";
|
constant csr_mscratch_c : std_ulogic_vector(11 downto 0) := x"340";
|
constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341";
|
constant csr_mepc_c : std_ulogic_vector(11 downto 0) := x"341";
|
constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342";
|
constant csr_mcause_c : std_ulogic_vector(11 downto 0) := x"342";
|
constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343";
|
constant csr_mtval_c : std_ulogic_vector(11 downto 0) := x"343";
|
constant csr_mip_c : std_ulogic_vector(11 downto 0) := x"344";
|
constant csr_mip_c : std_ulogic_vector(11 downto 0) := x"344";
|
| Line 759... |
Line 767... |
constant alu_func_cmd_csrr_c : std_ulogic_vector(1 downto 0) := "10"; -- r <= CSR read
|
constant alu_func_cmd_csrr_c : std_ulogic_vector(1 downto 0) := "10"; -- r <= CSR read
|
constant alu_func_cmd_copro_c : std_ulogic_vector(1 downto 0) := "11"; -- r <= CP result (multi-cycle)
|
constant alu_func_cmd_copro_c : std_ulogic_vector(1 downto 0) := "11"; -- r <= CP result (multi-cycle)
|
|
|
-- Trap ID Codes --------------------------------------------------------------------------
|
-- Trap ID Codes --------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- MSB : 1 = async exception (IRQ); 0 = sync exception (e.g. ebreak)
|
-- MSB: 1 = async exception (IRQ), 0 = sync exception (e.g. ebreak)
|
-- MSB-1 : 1 = entry to debug mode; 0 = normal trapping
|
-- MSB-1: 1 = entry to debug mode, 0 = normal trapping
|
-- RISC-V compliant sync. exceptions --
|
-- RISC-V compliant sync. exceptions --
|
constant trap_ima_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00000"; -- 0.0: instruction misaligned
|
constant trap_ima_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00000"; -- 0.0: instruction misaligned
|
constant trap_iba_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00001"; -- 0.1: instruction access fault
|
constant trap_iba_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00001"; -- 0.1: instruction access fault
|
constant trap_iil_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00010"; -- 0.2: illegal instruction
|
constant trap_iil_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00010"; -- 0.2: illegal instruction
|
constant trap_brk_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00011"; -- 0.3: breakpoint
|
constant trap_brk_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00011"; -- 0.3: breakpoint
|
| Line 773... |
Line 781... |
constant trap_sma_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00110"; -- 0.6: store address misaligned
|
constant trap_sma_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00110"; -- 0.6: store address misaligned
|
constant trap_sbe_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00111"; -- 0.7: store access fault
|
constant trap_sbe_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "00111"; -- 0.7: store access fault
|
constant trap_uenv_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "01000"; -- 0.8: environment call from u-mode
|
constant trap_uenv_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "01000"; -- 0.8: environment call from u-mode
|
constant trap_menv_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "01011"; -- 0.11: environment call from m-mode
|
constant trap_menv_c : std_ulogic_vector(6 downto 0) := "0" & "0" & "01011"; -- 0.11: environment call from m-mode
|
-- RISC-V compliant interrupts (async. exceptions) --
|
-- RISC-V compliant interrupts (async. exceptions) --
|
constant trap_nmi_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "00000"; -- 1.0: non-maskable interrupt
|
|
constant trap_msi_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "00011"; -- 1.3: machine software interrupt
|
constant trap_msi_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "00011"; -- 1.3: machine software interrupt
|
constant trap_mti_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "00111"; -- 1.7: machine timer interrupt
|
constant trap_mti_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "00111"; -- 1.7: machine timer interrupt
|
constant trap_mei_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "01011"; -- 1.11: machine external interrupt
|
constant trap_mei_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "01011"; -- 1.11: machine external interrupt
|
-- NEORV32-specific (custom) interrupts (async. exceptions) --
|
-- NEORV32-specific (custom) interrupts (async. exceptions) --
|
constant trap_firq0_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "10000"; -- 1.16: fast interrupt 0
|
constant trap_firq0_c : std_ulogic_vector(6 downto 0) := "1" & "0" & "10000"; -- 1.16: fast interrupt 0
|
| Line 817... |
Line 824... |
-- for debug mode only --
|
-- for debug mode only --
|
constant exception_db_break_c : natural := 10; -- enter debug mode via ebreak instruction ("sync EXCEPTION")
|
constant exception_db_break_c : natural := 10; -- enter debug mode via ebreak instruction ("sync EXCEPTION")
|
--
|
--
|
constant exception_width_c : natural := 11; -- length of this list in bits
|
constant exception_width_c : natural := 11; -- length of this list in bits
|
-- interrupt source bits --
|
-- interrupt source bits --
|
constant interrupt_nm_irq_c : natural := 0; -- non-maskable interrupt
|
constant interrupt_msw_irq_c : natural := 0; -- machine software interrupt
|
constant interrupt_msw_irq_c : natural := 1; -- machine software interrupt
|
constant interrupt_mtime_irq_c : natural := 1; -- machine timer interrupt
|
constant interrupt_mtime_irq_c : natural := 2; -- machine timer interrupt
|
constant interrupt_mext_irq_c : natural := 2; -- machine external interrupt
|
constant interrupt_mext_irq_c : natural := 3; -- machine external interrupt
|
constant interrupt_firq_0_c : natural := 3; -- fast interrupt channel 0
|
constant interrupt_firq_0_c : natural := 4; -- fast interrupt channel 0
|
constant interrupt_firq_1_c : natural := 4; -- fast interrupt channel 1
|
constant interrupt_firq_1_c : natural := 5; -- fast interrupt channel 1
|
constant interrupt_firq_2_c : natural := 5; -- fast interrupt channel 2
|
constant interrupt_firq_2_c : natural := 6; -- fast interrupt channel 2
|
constant interrupt_firq_3_c : natural := 6; -- fast interrupt channel 3
|
constant interrupt_firq_3_c : natural := 7; -- fast interrupt channel 3
|
constant interrupt_firq_4_c : natural := 7; -- fast interrupt channel 4
|
constant interrupt_firq_4_c : natural := 8; -- fast interrupt channel 4
|
constant interrupt_firq_5_c : natural := 8; -- fast interrupt channel 5
|
constant interrupt_firq_5_c : natural := 9; -- fast interrupt channel 5
|
constant interrupt_firq_6_c : natural := 9; -- fast interrupt channel 6
|
constant interrupt_firq_6_c : natural := 10; -- fast interrupt channel 6
|
constant interrupt_firq_7_c : natural := 10; -- fast interrupt channel 7
|
constant interrupt_firq_7_c : natural := 11; -- fast interrupt channel 7
|
constant interrupt_firq_8_c : natural := 11; -- fast interrupt channel 8
|
constant interrupt_firq_8_c : natural := 12; -- fast interrupt channel 8
|
constant interrupt_firq_9_c : natural := 12; -- fast interrupt channel 9
|
constant interrupt_firq_9_c : natural := 13; -- fast interrupt channel 9
|
constant interrupt_firq_10_c : natural := 13; -- fast interrupt channel 10
|
constant interrupt_firq_10_c : natural := 14; -- fast interrupt channel 10
|
constant interrupt_firq_11_c : natural := 14; -- fast interrupt channel 11
|
constant interrupt_firq_11_c : natural := 15; -- fast interrupt channel 11
|
constant interrupt_firq_12_c : natural := 15; -- fast interrupt channel 12
|
constant interrupt_firq_12_c : natural := 16; -- fast interrupt channel 12
|
constant interrupt_firq_13_c : natural := 16; -- fast interrupt channel 13
|
constant interrupt_firq_13_c : natural := 17; -- fast interrupt channel 13
|
constant interrupt_firq_14_c : natural := 17; -- fast interrupt channel 14
|
constant interrupt_firq_14_c : natural := 18; -- fast interrupt channel 14
|
constant interrupt_firq_15_c : natural := 18; -- fast interrupt channel 15
|
constant interrupt_firq_15_c : natural := 19; -- fast interrupt channel 15
|
|
-- for debug mode only --
|
-- for debug mode only --
|
constant interrupt_db_halt_c : natural := 20; -- enter debug mode via external halt request ("async IRQ")
|
constant interrupt_db_halt_c : natural := 19; -- enter debug mode via external halt request ("async IRQ")
|
constant interrupt_db_step_c : natural := 21; -- enter debug mode via single-stepping ("async IRQ")
|
constant interrupt_db_step_c : natural := 20; -- enter debug mode via single-stepping ("async IRQ")
|
--
|
--
|
constant interrupt_width_c : natural := 22; -- length of this list in bits
|
constant interrupt_width_c : natural := 21; -- length of this list in bits
|
|
|
-- CPU Privilege Modes --------------------------------------------------------------------
|
-- CPU Privilege Modes --------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant priv_mode_m_c : std_ulogic_vector(1 downto 0) := "11"; -- machine mode
|
constant priv_mode_m_c : std_ulogic_vector(1 downto 0) := "11"; -- machine mode
|
constant priv_mode_u_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
|
constant priv_mode_u_c : std_ulogic_vector(1 downto 0) := "00"; -- user mode
|
| Line 1021... |
Line 1027... |
mtime_i : in std_ulogic_vector(63 downto 0) := (others => 'U'); -- current system time from ext. MTIME (if IO_MTIME_EN = false)
|
mtime_i : in std_ulogic_vector(63 downto 0) := (others => 'U'); -- current system time from ext. MTIME (if IO_MTIME_EN = false)
|
mtime_o : out std_ulogic_vector(63 downto 0); -- current system time from int. MTIME (if IO_MTIME_EN = true)
|
mtime_o : out std_ulogic_vector(63 downto 0); -- current system time from int. MTIME (if IO_MTIME_EN = true)
|
-- External platform interrupts (available if XIRQ_NUM_CH > 0) --
|
-- External platform interrupts (available if XIRQ_NUM_CH > 0) --
|
xirq_i : in std_ulogic_vector(XIRQ_NUM_CH-1 downto 0) := (others => 'L'); -- IRQ channels
|
xirq_i : in std_ulogic_vector(XIRQ_NUM_CH-1 downto 0) := (others => 'L'); -- IRQ channels
|
-- CPU Interrupts --
|
-- CPU Interrupts --
|
nm_irq_i : in std_ulogic := 'L'; -- non-maskable interrupt
|
|
mtime_irq_i : in std_ulogic := 'L'; -- machine timer interrupt, available if IO_MTIME_EN = false
|
mtime_irq_i : in std_ulogic := 'L'; -- machine timer interrupt, available if IO_MTIME_EN = false
|
msw_irq_i : in std_ulogic := 'L'; -- machine software interrupt
|
msw_irq_i : in std_ulogic := 'L'; -- machine software interrupt
|
mext_irq_i : in std_ulogic := 'L' -- machine external interrupt
|
mext_irq_i : in std_ulogic := 'L' -- machine external interrupt
|
);
|
);
|
end component;
|
end component;
|
| Line 1091... |
Line 1096... |
d_bus_err_i : in std_ulogic; -- bus transfer error
|
d_bus_err_i : in std_ulogic; -- bus transfer error
|
d_bus_fence_o : out std_ulogic; -- executed FENCE operation
|
d_bus_fence_o : out std_ulogic; -- executed FENCE operation
|
d_bus_priv_o : out std_ulogic_vector(1 downto 0); -- privilege level
|
d_bus_priv_o : out std_ulogic_vector(1 downto 0); -- privilege level
|
-- system time input from MTIME --
|
-- system time input from MTIME --
|
time_i : in std_ulogic_vector(63 downto 0); -- current system time
|
time_i : in std_ulogic_vector(63 downto 0); -- current system time
|
-- non-maskable interrupt --
|
|
nm_irq_i : in std_ulogic; -- NMI
|
|
-- interrupts (risc-v compliant) --
|
-- interrupts (risc-v compliant) --
|
msw_irq_i : in std_ulogic; -- machine software interrupt
|
msw_irq_i : in std_ulogic; -- machine software interrupt
|
mext_irq_i : in std_ulogic; -- machine external interrupt
|
mext_irq_i : in std_ulogic; -- machine external interrupt
|
mtime_irq_i : in std_ulogic; -- machine timer interrupt
|
mtime_irq_i : in std_ulogic; -- machine timer interrupt
|
-- fast interrupts (custom) --
|
-- fast interrupts (custom) --
|
| Line 1158... |
Line 1161... |
csr_rdata_o : out std_ulogic_vector(data_width_c-1 downto 0); -- CSR read data
|
csr_rdata_o : out std_ulogic_vector(data_width_c-1 downto 0); -- CSR read data
|
-- FPU interface --
|
-- FPU interface --
|
fpu_flags_i : in std_ulogic_vector(04 downto 0); -- exception flags
|
fpu_flags_i : in std_ulogic_vector(04 downto 0); -- exception flags
|
-- debug mode (halt) request --
|
-- debug mode (halt) request --
|
db_halt_req_i : in std_ulogic;
|
db_halt_req_i : in std_ulogic;
|
-- non-maskable interrupt --
|
|
nm_irq_i : in std_ulogic;
|
|
-- interrupts (risc-v compliant) --
|
-- interrupts (risc-v compliant) --
|
msw_irq_i : in std_ulogic; -- machine software interrupt
|
msw_irq_i : in std_ulogic; -- machine software interrupt
|
mext_irq_i : in std_ulogic; -- machine external interrupt
|
mext_irq_i : in std_ulogic; -- machine external interrupt
|
mtime_irq_i : in std_ulogic; -- machine timer interrupt
|
mtime_irq_i : in std_ulogic; -- machine timer interrupt
|
-- fast interrupts (custom) --
|
-- fast interrupts (custom) --
|
