| Line 44... |
Line 44... |
constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant ispace_base_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- default instruction memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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constant dspace_base_c : std_ulogic_vector(31 downto 0) := x"80000000"; -- default data memory address space base address
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|
|
-- CPU core --
|
-- CPU core --
|
constant dedicated_reset_c : boolean := false; -- use dedicated hardware reset value for UNCRITICAL registers (FALSE=reset value is irrelevant (might simplify HW), default; TRUE=defined LOW reset value)
|
constant dedicated_reset_c : boolean := false; -- use dedicated hardware reset value for UNCRITICAL registers (FALSE=reset value is irrelevant (might simplify HW), default; TRUE=defined LOW reset value)
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constant cp_timeout_en_c : boolean := false; -- auto-terminate pending co-processor operations after 256 cycles (for debugging only), default = false
|
|
|
|
-- "critical" number of implemented PMP regions --
|
-- "critical" number of implemented PMP regions --
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-- if more PMP regions (> pmp_num_regions_critical_c) are defined, another register stage is automatically inserted into the memory interfaces
|
-- if more PMP regions (> pmp_num_regions_critical_c) are defined, another register stage is automatically inserted into the memory interfaces
|
-- increasing instruction fetch & data access latency by +1 cycle but also reducing critical path length
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-- increasing instruction fetch & data access latency by +1 cycle but also reducing critical path length
|
constant pmp_num_regions_critical_c : natural := 8; -- default=8
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constant pmp_num_regions_critical_c : natural := 8; -- default=8
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| Line 62... |
Line 61... |
constant jtag_tap_idcode_manid_c : std_ulogic_vector(10 downto 0) := "00000000000"; -- manufacturer id
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constant jtag_tap_idcode_manid_c : std_ulogic_vector(10 downto 0) := "00000000000"; -- manufacturer id
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|
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- Architecture Constants (do not modify!) ------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant data_width_c : natural := 32; -- native data path width - do not change!
|
constant data_width_c : natural := 32; -- native data path width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060600"; -- no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060700"; -- no touchy!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
|
constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
|
|
|
-- Check if we're inside the Matrix -------------------------------------------------------
|
-- Check if we're inside the Matrix -------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant is_simulation_c : boolean := false -- seems like we're on real hardware
|
constant is_simulation_c : boolean := false -- seems like we're on real hardware
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| Line 88... |
Line 87... |
|
|
-- Internal Interface Types ---------------------------------------------------------------
|
-- Internal Interface Types ---------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
type pmp_ctrl_if_t is array (0 to 63) of std_ulogic_vector(07 downto 0);
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type pmp_ctrl_if_t is array (0 to 63) of std_ulogic_vector(07 downto 0);
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type pmp_addr_if_t is array (0 to 63) of std_ulogic_vector(33 downto 0);
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type pmp_addr_if_t is array (0 to 63) of std_ulogic_vector(33 downto 0);
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type cp_data_if_t is array (0 to 3) of std_ulogic_vector(data_width_c-1 downto 0);
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|
|
|
-- Internal Memory Types Configuration Types ----------------------------------------------
|
-- Internal Memory Types Configuration Types ----------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
type mem32_t is array (natural range <>) of std_ulogic_vector(31 downto 0); -- memory with 32-bit entries
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type mem32_t is array (natural range <>) of std_ulogic_vector(31 downto 0); -- memory with 32-bit entries
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type mem8_t is array (natural range <>) of std_ulogic_vector(07 downto 0); -- memory with 8-bit entries
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type mem8_t is array (natural range <>) of std_ulogic_vector(07 downto 0); -- memory with 8-bit entries
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| Line 104... |
Line 102... |
function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer;
|
function cond_sel_int_f(cond : boolean; val_t : integer; val_f : integer) return integer;
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function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
|
function cond_sel_stdulogicvector_f(cond : boolean; val_t : std_ulogic_vector; val_f : std_ulogic_vector) return std_ulogic_vector;
|
function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic;
|
function cond_sel_stdulogic_f(cond : boolean; val_t : std_ulogic; val_f : std_ulogic) return std_ulogic;
|
function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
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function cond_sel_string_f(cond : boolean; val_t : string; val_f : string) return string;
|
function bool_to_ulogic_f(cond : boolean) return std_ulogic;
|
function bool_to_ulogic_f(cond : boolean) return std_ulogic;
|
|
function bin_to_gray_f(input : std_ulogic_vector) return std_ulogic_vector;
|
|
function gray_to_bin_f(input : std_ulogic_vector) return std_ulogic_vector;
|
function or_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function or_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function and_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function and_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function xor_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function xor_reduce_f(a : std_ulogic_vector) return std_ulogic;
|
function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
|
function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
|
function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
|
function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
|
| Line 367... |
Line 367... |
constant ctrl_bus_lock_c : natural := 42; -- make atomic/exclusive access lock
|
constant ctrl_bus_lock_c : natural := 42; -- make atomic/exclusive access lock
|
constant ctrl_bus_de_lock_c : natural := 43; -- remove atomic/exclusive access
|
constant ctrl_bus_de_lock_c : natural := 43; -- remove atomic/exclusive access
|
constant ctrl_bus_ch_lock_c : natural := 44; -- evaluate atomic/exclusive lock (SC operation)
|
constant ctrl_bus_ch_lock_c : natural := 44; -- evaluate atomic/exclusive lock (SC operation)
|
-- co-processors --
|
-- co-processors --
|
constant ctrl_cp_id_lsb_c : natural := 45; -- cp select ID lsb
|
constant ctrl_cp_id_lsb_c : natural := 45; -- cp select ID lsb
|
constant ctrl_cp_id_msb_c : natural := 46; -- cp select ID msb
|
constant ctrl_cp_id_hsb_c : natural := 46; -- cp select ID "half" significant bit
|
|
constant ctrl_cp_id_msb_c : natural := 47; -- cp select ID msb
|
-- instruction's control blocks (used by cpu co-processors) --
|
-- instruction's control blocks (used by cpu co-processors) --
|
constant ctrl_ir_funct3_0_c : natural := 47; -- funct3 bit 0
|
constant ctrl_ir_funct3_0_c : natural := 48; -- funct3 bit 0
|
constant ctrl_ir_funct3_1_c : natural := 48; -- funct3 bit 1
|
constant ctrl_ir_funct3_1_c : natural := 49; -- funct3 bit 1
|
constant ctrl_ir_funct3_2_c : natural := 49; -- funct3 bit 2
|
constant ctrl_ir_funct3_2_c : natural := 50; -- funct3 bit 2
|
constant ctrl_ir_funct12_0_c : natural := 50; -- funct12 bit 0
|
constant ctrl_ir_funct12_0_c : natural := 51; -- funct12 bit 0
|
constant ctrl_ir_funct12_1_c : natural := 51; -- funct12 bit 1
|
constant ctrl_ir_funct12_1_c : natural := 52; -- funct12 bit 1
|
constant ctrl_ir_funct12_2_c : natural := 52; -- funct12 bit 2
|
constant ctrl_ir_funct12_2_c : natural := 53; -- funct12 bit 2
|
constant ctrl_ir_funct12_3_c : natural := 53; -- funct12 bit 3
|
constant ctrl_ir_funct12_3_c : natural := 54; -- funct12 bit 3
|
constant ctrl_ir_funct12_4_c : natural := 54; -- funct12 bit 4
|
constant ctrl_ir_funct12_4_c : natural := 55; -- funct12 bit 4
|
constant ctrl_ir_funct12_5_c : natural := 55; -- funct12 bit 5
|
constant ctrl_ir_funct12_5_c : natural := 56; -- funct12 bit 5
|
constant ctrl_ir_funct12_6_c : natural := 56; -- funct12 bit 6
|
constant ctrl_ir_funct12_6_c : natural := 57; -- funct12 bit 6
|
constant ctrl_ir_funct12_7_c : natural := 57; -- funct12 bit 7
|
constant ctrl_ir_funct12_7_c : natural := 58; -- funct12 bit 7
|
constant ctrl_ir_funct12_8_c : natural := 58; -- funct12 bit 8
|
constant ctrl_ir_funct12_8_c : natural := 59; -- funct12 bit 8
|
constant ctrl_ir_funct12_9_c : natural := 59; -- funct12 bit 9
|
constant ctrl_ir_funct12_9_c : natural := 60; -- funct12 bit 9
|
constant ctrl_ir_funct12_10_c : natural := 60; -- funct12 bit 10
|
constant ctrl_ir_funct12_10_c : natural := 61; -- funct12 bit 10
|
constant ctrl_ir_funct12_11_c : natural := 61; -- funct12 bit 11
|
constant ctrl_ir_funct12_11_c : natural := 62; -- funct12 bit 11
|
constant ctrl_ir_opcode7_0_c : natural := 62; -- opcode7 bit 0
|
constant ctrl_ir_opcode7_0_c : natural := 63; -- opcode7 bit 0
|
constant ctrl_ir_opcode7_1_c : natural := 63; -- opcode7 bit 1
|
constant ctrl_ir_opcode7_1_c : natural := 64; -- opcode7 bit 1
|
constant ctrl_ir_opcode7_2_c : natural := 64; -- opcode7 bit 2
|
constant ctrl_ir_opcode7_2_c : natural := 65; -- opcode7 bit 2
|
constant ctrl_ir_opcode7_3_c : natural := 65; -- opcode7 bit 3
|
constant ctrl_ir_opcode7_3_c : natural := 66; -- opcode7 bit 3
|
constant ctrl_ir_opcode7_4_c : natural := 66; -- opcode7 bit 4
|
constant ctrl_ir_opcode7_4_c : natural := 67; -- opcode7 bit 4
|
constant ctrl_ir_opcode7_5_c : natural := 67; -- opcode7 bit 5
|
constant ctrl_ir_opcode7_5_c : natural := 68; -- opcode7 bit 5
|
constant ctrl_ir_opcode7_6_c : natural := 68; -- opcode7 bit 6
|
constant ctrl_ir_opcode7_6_c : natural := 69; -- opcode7 bit 6
|
-- CPU status --
|
-- CPU status --
|
constant ctrl_priv_lvl_lsb_c : natural := 69; -- privilege level lsb
|
constant ctrl_priv_lvl_lsb_c : natural := 70; -- privilege level lsb
|
constant ctrl_priv_lvl_msb_c : natural := 70; -- privilege level msb
|
constant ctrl_priv_lvl_msb_c : natural := 71; -- privilege level msb
|
constant ctrl_sleep_c : natural := 71; -- set when CPU is in sleep mode
|
constant ctrl_sleep_c : natural := 72; -- set when CPU is in sleep mode
|
constant ctrl_trap_c : natural := 72; -- set when CPU is entering trap execution
|
constant ctrl_trap_c : natural := 73; -- set when CPU is entering trap execution
|
constant ctrl_debug_running_c : natural := 73; -- CPU is in debug mode when set
|
constant ctrl_debug_running_c : natural := 74; -- CPU is in debug mode when set
|
-- control bus size --
|
-- control bus size --
|
constant ctrl_width_c : natural := 74; -- control bus size
|
constant ctrl_width_c : natural := 75; -- control bus size
|
|
|
-- Comparator Bus -------------------------------------------------------------------------
|
-- Comparator Bus -------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant cmp_equal_c : natural := 0;
|
constant cmp_equal_c : natural := 0;
|
constant cmp_less_c : natural := 1; -- for signed and unsigned comparisons
|
constant cmp_less_c : natural := 1; -- for signed and unsigned comparisons
|
| Line 773... |
Line 774... |
constant csr_mhartid_c : std_ulogic_vector(11 downto 0) := x"f14";
|
constant csr_mhartid_c : std_ulogic_vector(11 downto 0) := x"f14";
|
constant csr_mconfigptr_c : std_ulogic_vector(11 downto 0) := x"f15";
|
constant csr_mconfigptr_c : std_ulogic_vector(11 downto 0) := x"f15";
|
|
|
-- Co-Processor IDs -----------------------------------------------------------------------
|
-- Co-Processor IDs -----------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
constant cp_sel_shifter_c : std_ulogic_vector(1 downto 0) := "00"; -- shift operations (base ISA)
|
constant cp_sel_shifter_c : std_ulogic_vector(2 downto 0) := "000"; -- CP0: shift operations (base ISA)
|
constant cp_sel_muldiv_c : std_ulogic_vector(1 downto 0) := "01"; -- multiplication/division operations ('M' extensions)
|
constant cp_sel_muldiv_c : std_ulogic_vector(2 downto 0) := "001"; -- CP1: multiplication/division operations ('M' extensions)
|
constant cp_sel_bitmanip_c : std_ulogic_vector(1 downto 0) := "10"; -- bit manipulation ('B' extensions)
|
constant cp_sel_bitmanip_c : std_ulogic_vector(2 downto 0) := "010"; -- CP2: bit manipulation ('B' extensions)
|
constant cp_sel_fpu_c : std_ulogic_vector(1 downto 0) := "11"; -- floating-point unit ('Zfinx' extension)
|
constant cp_sel_fpu_c : std_ulogic_vector(2 downto 0) := "011"; -- CP3: floating-point unit ('Zfinx' extension)
|
|
--constant cp_sel_res0_c : std_ulogic_vector(2 downto 0) := "100"; -- CP4: reserved
|
|
--constant cp_sel_res1_c : std_ulogic_vector(2 downto 0) := "101"; -- CP5: reserved
|
|
--constant cp_sel_res2_c : std_ulogic_vector(2 downto 0) := "110"; -- CP6: reserved
|
|
--constant cp_sel_res3_c : std_ulogic_vector(2 downto 0) := "111"; -- CP7: reserved
|
|
|
-- ALU Function Codes ---------------------------------------------------------------------
|
-- ALU Function Codes ---------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- ALU core [DO NOT CHANGE ENCODING!] --
|
-- ALU core [DO NOT CHANGE ENCODING!] --
|
constant alu_op_add_c : std_ulogic_vector(2 downto 0) := "000"; -- alu_result <= A + B
|
constant alu_op_add_c : std_ulogic_vector(2 downto 0) := "000"; -- alu_result <= A + B
|
| Line 2117... |
Line 2122... |
dmi_resp_valid_o : out std_ulogic; -- response valid when set
|
dmi_resp_valid_o : out std_ulogic; -- response valid when set
|
dmi_resp_ready_i : in std_ulogic; -- ready to receive respond
|
dmi_resp_ready_i : in std_ulogic; -- ready to receive respond
|
dmi_resp_data_o : out std_ulogic_vector(31 downto 0);
|
dmi_resp_data_o : out std_ulogic_vector(31 downto 0);
|
dmi_resp_err_o : out std_ulogic; -- 0=ok, 1=error
|
dmi_resp_err_o : out std_ulogic; -- 0=ok, 1=error
|
-- CPU bus access --
|
-- CPU bus access --
|
|
cpu_debug_i : in std_ulogic; -- CPU is in debug mode
|
cpu_addr_i : in std_ulogic_vector(31 downto 0); -- address
|
cpu_addr_i : in std_ulogic_vector(31 downto 0); -- address
|
cpu_rden_i : in std_ulogic; -- read enable
|
cpu_rden_i : in std_ulogic; -- read enable
|
cpu_wren_i : in std_ulogic; -- write enable
|
cpu_wren_i : in std_ulogic; -- write enable
|
cpu_data_i : in std_ulogic_vector(31 downto 0); -- data in
|
cpu_data_i : in std_ulogic_vector(31 downto 0); -- data in
|
cpu_data_o : out std_ulogic_vector(31 downto 0); -- data out
|
cpu_data_o : out std_ulogic_vector(31 downto 0); -- data out
|
| Line 2243... |
Line 2249... |
else
|
else
|
return '0';
|
return '0';
|
end if;
|
end if;
|
end function bool_to_ulogic_f;
|
end function bool_to_ulogic_f;
|
|
|
|
-- Function: Convert binary to gray -------------------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
function bin_to_gray_f(input : std_ulogic_vector) return std_ulogic_vector is
|
|
variable tmp_v : std_ulogic_vector(input'range);
|
|
begin
|
|
tmp_v(input'length-1) := input(input'length-1); -- keep MSB
|
|
for i in input'length-2 downto 0 loop
|
|
tmp_v(i) := input(i) xor input(i+1);
|
|
end loop; -- i
|
|
return tmp_v;
|
|
end function bin_to_gray_f;
|
|
|
|
-- Function: Convert gray to binary -------------------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
function gray_to_bin_f(input : std_ulogic_vector) return std_ulogic_vector is
|
|
variable tmp_v : std_ulogic_vector(input'range);
|
|
begin
|
|
tmp_v(input'length-1) := input(input'length-1); -- keep MSB
|
|
for i in input'length-2 downto 0 loop
|
|
tmp_v(i) := tmp_v(i+1) xor input(i);
|
|
end loop; -- i
|
|
return tmp_v;
|
|
end function gray_to_bin_f;
|
|
|
-- Function: OR-reduce all bits -----------------------------------------------------------
|
-- Function: OR-reduce all bits -----------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
function or_reduce_f(a : std_ulogic_vector) return std_ulogic is
|
function or_reduce_f(a : std_ulogic_vector) return std_ulogic is
|
variable tmp_v : std_ulogic;
|
variable tmp_v : std_ulogic;
|
begin
|
begin
|
