Line 585... |
Line 585... |
clic_xirq(4) <= spi_irq;
|
clic_xirq(4) <= spi_irq;
|
clic_xirq(5) <= twi_irq;
|
clic_xirq(5) <= twi_irq;
|
clic_xirq(6) <= ext_irq_i(0);
|
clic_xirq(6) <= ext_irq_i(0);
|
clic_xirq(7) <= ext_irq_i(1); -- lowest priority
|
clic_xirq(7) <= ext_irq_i(1); -- lowest priority
|
|
|
ext_ack_o <= clic_xirq(7 downto 6); -- external interrupt request acknowledge
|
-- external interrupt request acknowledge --
|
|
ext_ack_o(0) <= clic_xack(6);
|
|
ext_ack_o(1) <= clic_xack(7);
|
|
|
neorv32_clic_inst_false:
|
neorv32_clic_inst_false:
|
if (IO_CLIC_USE = false) generate
|
if (IO_CLIC_USE = false) generate
|
clic_rdata <= (others => '0');
|
clic_rdata <= (others => '0');
|
clic_ack <= '0';
|
clic_ack <= '0';
|
Line 639... |
Line 641... |
if (IO_MTIME_USE = true) generate
|
if (IO_MTIME_USE = true) generate
|
neorv32_mtime_inst: neorv32_mtime
|
neorv32_mtime_inst: neorv32_mtime
|
port map (
|
port map (
|
-- host access --
|
-- host access --
|
clk_i => clk_i, -- global clock line
|
clk_i => clk_i, -- global clock line
|
|
rstn_i => sys_rstn, -- global reset, low-active, async
|
addr_i => cpu_addr, -- address
|
addr_i => cpu_addr, -- address
|
rden_i => io_rden, -- read enable
|
rden_i => io_rden, -- read enable
|
wren_i => io_wren, -- write enable
|
wren_i => io_wren, -- write enable
|
ben_i => cpu_ben, -- byte write enable
|
ben_i => cpu_ben, -- byte write enable
|
data_i => cpu_wdata, -- data in
|
data_i => cpu_wdata, -- data in
|