Line 78... |
Line 78... |
MEM_INT_DMEM_SIZE : natural := 8*1024; -- size of processor-internal data memory in bytes
|
MEM_INT_DMEM_SIZE : natural := 8*1024; -- size of processor-internal data memory in bytes
|
-- Internal Cache memory --
|
-- Internal Cache memory --
|
ICACHE_EN : boolean := false; -- implement instruction cache
|
ICACHE_EN : boolean := false; -- implement instruction cache
|
ICACHE_NUM_BLOCKS : natural := 4; -- i-cache: number of blocks (min 1), has to be a power of 2
|
ICACHE_NUM_BLOCKS : natural := 4; -- i-cache: number of blocks (min 1), has to be a power of 2
|
ICACHE_BLOCK_SIZE : natural := 64; -- i-cache: block size in bytes (min 4), has to be a power of 2
|
ICACHE_BLOCK_SIZE : natural := 64; -- i-cache: block size in bytes (min 4), has to be a power of 2
|
|
ICACHE_ASSOCIATIVITY : natural := 1; -- i-cache: associativity / number of sets (1=direct_mapped), has to be a power of 2
|
-- External memory interface --
|
-- External memory interface --
|
MEM_EXT_EN : boolean := false; -- implement external memory bus interface?
|
MEM_EXT_EN : boolean := false; -- implement external memory bus interface?
|
-- Processor peripherals --
|
-- Processor peripherals --
|
IO_GPIO_EN : boolean := true; -- implement general purpose input/output port unit (GPIO)?
|
IO_GPIO_EN : boolean := true; -- implement general purpose input/output port unit (GPIO)?
|
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
IO_MTIME_EN : boolean := true; -- implement machine system timer (MTIME)?
|
Line 325... |
Line 326... |
clk_gen(clk_div4096_c) <= clk_div(11) and (not clk_div_ff(11)); -- CLK/4096
|
clk_gen(clk_div4096_c) <= clk_div(11) and (not clk_div_ff(11)); -- CLK/4096
|
end if;
|
end if;
|
end process clock_generator_edge;
|
end process clock_generator_edge;
|
|
|
|
|
-- CPU ------------------------------------------------------------------------------------
|
-- CPU Core -------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
neorv32_cpu_inst: neorv32_cpu
|
neorv32_cpu_inst: neorv32_cpu
|
generic map (
|
generic map (
|
-- General --
|
-- General --
|
HW_THREAD_ID => HW_THREAD_ID, -- hardware thread id
|
HW_THREAD_ID => HW_THREAD_ID, -- hardware thread id
|
Line 410... |
Line 411... |
|
|
-- CPU Instruction Cache ------------------------------------------------------------------
|
-- CPU Instruction Cache ------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
neorv32_icache_inst_true:
|
neorv32_icache_inst_true:
|
if (ICACHE_EN = true) generate
|
if (ICACHE_EN = true) generate
|
neorv32_icache_inst: neorv32_cache
|
neorv32_icache_inst: neorv32_icache
|
generic map (
|
generic map (
|
CACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS, -- number of blocks (min 2), has to be a power of 2
|
CACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS, -- number of blocks (min 2), has to be a power of 2
|
CACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE -- block size in bytes (min 4), has to be a power of 2
|
CACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE, -- block size in bytes (min 4), has to be a power of 2
|
|
CACHE_NUM_SETS => ICACHE_ASSOCIATIVITY -- associativity / number of sets (1=direct_mapped), has to be a power of 2
|
)
|
)
|
port map (
|
port map (
|
-- global control --
|
-- global control --
|
clk_i => clk_i, -- global clock, rising edge
|
clk_i => clk_i, -- global clock, rising edge
|
rstn_i => sys_rstn, -- global reset, low-active, async
|
rstn_i => sys_rstn, -- global reset, low-active, async
|
Line 460... |
Line 462... |
cpu_i.ack <= i_cache.ack;
|
cpu_i.ack <= i_cache.ack;
|
cpu_i.err <= i_cache.err;
|
cpu_i.err <= i_cache.err;
|
end generate;
|
end generate;
|
|
|
|
|
-- CPU Crossbar Switch --------------------------------------------------------------------
|
-- CPU Bus Switch -------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
neorv32_busswitch_inst: neorv32_busswitch
|
neorv32_busswitch_inst: neorv32_busswitch
|
generic map (
|
generic map (
|
PORT_CA_READ_ONLY => false, -- set if controller port A is read-only
|
PORT_CA_READ_ONLY => false, -- set if controller port A is read-only
|
PORT_CB_READ_ONLY => true -- set if controller port B is read-only
|
PORT_CB_READ_ONLY => true -- set if controller port B is read-only
|
Line 1018... |
Line 1020... |
MEM_INT_DMEM_SIZE => MEM_INT_DMEM_SIZE, -- size of processor-internal data memory in bytes
|
MEM_INT_DMEM_SIZE => MEM_INT_DMEM_SIZE, -- size of processor-internal data memory in bytes
|
-- Internal Cache memory --
|
-- Internal Cache memory --
|
ICACHE_EN => ICACHE_EN, -- implement instruction cache
|
ICACHE_EN => ICACHE_EN, -- implement instruction cache
|
ICACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS, -- i-cache: number of blocks (min 2), has to be a power of 2
|
ICACHE_NUM_BLOCKS => ICACHE_NUM_BLOCKS, -- i-cache: number of blocks (min 2), has to be a power of 2
|
ICACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE, -- i-cache: block size in bytes (min 4), has to be a power of 2
|
ICACHE_BLOCK_SIZE => ICACHE_BLOCK_SIZE, -- i-cache: block size in bytes (min 4), has to be a power of 2
|
ICACHE_ASSOCIATIVITY => 1, -- i-cache: associativity (min 1), has to be a power 2
|
ICACHE_ASSOCIATIVITY => ICACHE_ASSOCIATIVITY, -- i-cache: associativity (min 1), has to be a power 2
|
-- External memory interface --
|
-- External memory interface --
|
MEM_EXT_EN => MEM_EXT_EN, -- implement external memory bus interface?
|
MEM_EXT_EN => MEM_EXT_EN, -- implement external memory bus interface?
|
-- Processor peripherals --
|
-- Processor peripherals --
|
IO_GPIO_EN => IO_GPIO_EN, -- implement general purpose input/output port unit (GPIO)?
|
IO_GPIO_EN => IO_GPIO_EN, -- implement general purpose input/output port unit (GPIO)?
|
IO_MTIME_EN => IO_MTIME_EN, -- implement machine system timer (MTIME)?
|
IO_MTIME_EN => IO_MTIME_EN, -- implement machine system timer (MTIME)?
|