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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_wishbone.vhd] - Diff between revs 59 and 60
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| Rev 59 |
Rev 60 |
| Line 191... |
Line 191... |
ctrl.rd_req <= '0';
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ctrl.rd_req <= '0';
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ctrl.wr_req <= '0';
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ctrl.wr_req <= '0';
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-- buffer all outgoing signals --
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-- buffer all outgoing signals --
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ctrl.we <= wren_i or ctrl.wr_req;
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ctrl.we <= wren_i or ctrl.wr_req;
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ctrl.adr <= addr_i;
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ctrl.adr <= addr_i;
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if (xbus_big_endian_c = true) then -- endianness conversion
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if (xbus_big_endian_c = true) then -- big-endian
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ctrl.wdat <= data_i;
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ctrl.sel <= ben_i;
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else
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ctrl.wdat <= bswap32_f(data_i);
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ctrl.wdat <= bswap32_f(data_i);
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ctrl.sel <= bit_rev_f(ben_i);
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ctrl.sel <= bit_rev_f(ben_i);
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else -- little-endian
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ctrl.wdat <= data_i;
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ctrl.sel <= ben_i;
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end if;
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end if;
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ctrl.src <= src_i;
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ctrl.src <= src_i;
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ctrl.lock <= lock_i;
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ctrl.lock <= lock_i;
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ctrl.priv <= priv_i;
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ctrl.priv <= priv_i;
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-- valid new or buffered read/write request --
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-- valid new or buffered read/write request --
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| Line 215... |
Line 215... |
ctrl.err <= '1';
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ctrl.err <= '1';
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ctrl.state <= IDLE;
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ctrl.state <= IDLE;
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elsif (wb_ack_i = '1') then -- normal bus termination
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elsif (wb_ack_i = '1') then -- normal bus termination
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ctrl.ack <= '1';
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ctrl.ack <= '1';
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ctrl.state <= IDLE;
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ctrl.state <= IDLE;
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elsif (timeout_en_c = true) and (or_all_f(ctrl.timeout) = '0') then -- valid timeout
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elsif (timeout_en_c = true) and (or_reduce_f(ctrl.timeout) = '0') then -- valid timeout
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ctrl.err <= '1';
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ctrl.err <= '1';
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ctrl.state <= IDLE;
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ctrl.state <= IDLE;
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end if;
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end if;
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-- timeout counter --
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-- timeout counter --
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if (timeout_en_c = true) then
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if (timeout_en_c = true) then
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| Line 241... |
Line 241... |
end case;
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end case;
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end if;
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end if;
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end process bus_arbiter;
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end process bus_arbiter;
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-- host access --
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-- host access --
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data_o <= ctrl.rdat when (xbus_big_endian_c = true) else bswap32_f(ctrl.rdat); -- endianness conversion
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data_o <= ctrl.rdat when (xbus_big_endian_c = false) else bswap32_f(ctrl.rdat); -- endianness conversion
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ack_o <= ctrl.ack;
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ack_o <= ctrl.ack;
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err_o <= ctrl.err;
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err_o <= ctrl.err;
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-- wishbone interface --
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-- wishbone interface --
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wb_tag_o(0) <= '1' when (ctrl.priv = priv_mode_m_c) else '0'; -- privileged access when in machine mode
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wb_tag_o(0) <= '1' when (ctrl.priv = priv_mode_m_c) else '0'; -- privileged access when in machine mode
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