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[/] [neorv32/] [trunk/] [sim/] [neorv32_tb.vhd] - Diff between revs 15 and 16

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Rev 15	Rev 16
Line 138...	Line 138...
`CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?`	`CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?`
`CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?`	`CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?`
`-- Physical Memory Protection (PMP) --`	`-- Physical Memory Protection (PMP) --`
`PMP_USE => true, -- implement PMP?`	`PMP_USE => true, -- implement PMP?`
`PMP_NUM_REGIONS => 4, -- number of regions (max 16)`	`PMP_NUM_REGIONS => 4, -- number of regions (max 16)`
`PMP_GRANULARITY => 15, -- region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k`	`PMP_GRANULARITY => 14, -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k`
`-- Memory configuration: Instruction memory --`	`-- Memory configuration: Instruction memory --`
`MEM_ISPACE_BASE => x"00000000", -- base address of instruction memory space`	`MEM_ISPACE_BASE => x"00000000", -- base address of instruction memory space`
`MEM_ISPACE_SIZE => 16*1024, -- total size of instruction memory space in byte`	`MEM_ISPACE_SIZE => 16*1024, -- total size of instruction memory space in byte`
`MEM_INT_IMEM_USE => true, -- implement processor-internal instruction memory`	`MEM_INT_IMEM_USE => true, -- implement processor-internal instruction memory`
`MEM_INT_IMEM_SIZE => 16*1024, -- size of processor-internal instruction memory in bytes`	`MEM_INT_IMEM_SIZE => 16*1024, -- size of processor-internal instruction memory in bytes`

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