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[/] [neorv32/] [trunk/] [sim/] [neorv32_tb.vhd] - Diff between revs 53 and 55
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Rev 53 |
Rev 55 |
Line 198... |
Line 198... |
CPU_EXTENSION_RISCV_B => true, -- implement bit manipulation extensions?
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CPU_EXTENSION_RISCV_B => true, -- implement bit manipulation extensions?
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CPU_EXTENSION_RISCV_C => true, -- implement compressed extension?
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CPU_EXTENSION_RISCV_C => true, -- implement compressed extension?
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CPU_EXTENSION_RISCV_E => false, -- implement embedded RF extension?
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CPU_EXTENSION_RISCV_E => false, -- implement embedded RF extension?
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CPU_EXTENSION_RISCV_M => true, -- implement muld/div extension?
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CPU_EXTENSION_RISCV_M => true, -- implement muld/div extension?
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CPU_EXTENSION_RISCV_U => true, -- implement user mode extension?
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CPU_EXTENSION_RISCV_U => true, -- implement user mode extension?
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CPU_EXTENSION_RISCV_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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