| Line 292... |
Line 292... |
CPU_EXTENSION_RISCV_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
|
CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicntr => true, -- implement base counters?
|
CPU_EXTENSION_RISCV_Zicntr => true, -- implement base counters?
|
CPU_EXTENSION_RISCV_Zihpm => true, -- implement hardware performance monitors?
|
CPU_EXTENSION_RISCV_Zihpm => true, -- implement hardware performance monitors?
|
CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
|
CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
|
|
CPU_EXTENSION_RISCV_Zmmul => false, -- implement multiply-only M sub-extension?
|
|
CPU_EXTENSION_RISCV_Zxcfu => true, -- implement custom (instr.) functions unit?
|
-- Extension Options --
|
-- Extension Options --
|
FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
|
FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
|
FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
|
FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
|
CPU_CNT_WIDTH => 64, -- total width of CPU cycle and instret counters (0..64)
|
CPU_CNT_WIDTH => 64, -- total width of CPU cycle and instret counters (0..64)
|
-- Physical Memory Protection (PMP) --
|
-- Physical Memory Protection (PMP) --
|
