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use std.textio.all;
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use std.textio.all;
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entity neorv32_tb_simple is
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entity neorv32_tb_simple is
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generic (
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generic (
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CPU_EXTENSION_RISCV_A : boolean := true;
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CPU_EXTENSION_RISCV_A : boolean := true;
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CPU_EXTENSION_RISCV_B : boolean := true;
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CPU_EXTENSION_RISCV_C : boolean := true;
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CPU_EXTENSION_RISCV_C : boolean := true;
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CPU_EXTENSION_RISCV_E : boolean := false;
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CPU_EXTENSION_RISCV_E : boolean := false;
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CPU_EXTENSION_RISCV_M : boolean := true;
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CPU_EXTENSION_RISCV_M : boolean := true;
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CPU_EXTENSION_RISCV_U : boolean := true;
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CPU_EXTENSION_RISCV_U : boolean := true;
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CPU_EXTENSION_RISCV_Zbb : boolean := true;
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CPU_EXTENSION_RISCV_Zicsr : boolean := true;
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CPU_EXTENSION_RISCV_Zicsr : boolean := true;
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CPU_EXTENSION_RISCV_Zifencei : boolean := true;
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CPU_EXTENSION_RISCV_Zifencei : boolean := true;
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EXT_IMEM_C : boolean := false; -- false: use and boot from proc-internal IMEM, true: use and boot from external (initialized) simulated IMEM (ext. mem A)
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EXT_IMEM_C : boolean := false; -- false: use and boot from proc-internal IMEM, true: use and boot from external (initialized) simulated IMEM (ext. mem A)
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MEM_INT_IMEM_SIZE : natural := 16*1024 -- size in bytes of processor-internal IMEM / external mem A
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MEM_INT_IMEM_SIZE : natural := 16*1024 -- size in bytes of processor-internal IMEM / external mem A
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);
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);
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INT_BOOTLOADER_EN => false, -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
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INT_BOOTLOADER_EN => false, -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
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-- On-Chip Debugger (OCD) --
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-- On-Chip Debugger (OCD) --
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ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger
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ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger
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-- RISC-V CPU Extensions --
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-- RISC-V CPU Extensions --
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CPU_EXTENSION_RISCV_A => CPU_EXTENSION_RISCV_A, -- implement atomic extension?
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CPU_EXTENSION_RISCV_A => CPU_EXTENSION_RISCV_A, -- implement atomic extension?
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CPU_EXTENSION_RISCV_B => CPU_EXTENSION_RISCV_B, -- implement bit-manipulation extension?
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CPU_EXTENSION_RISCV_C => CPU_EXTENSION_RISCV_C, -- implement compressed extension?
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CPU_EXTENSION_RISCV_C => CPU_EXTENSION_RISCV_C, -- implement compressed extension?
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CPU_EXTENSION_RISCV_E => CPU_EXTENSION_RISCV_E, -- implement embedded RF extension?
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CPU_EXTENSION_RISCV_E => CPU_EXTENSION_RISCV_E, -- implement embedded RF extension?
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CPU_EXTENSION_RISCV_M => CPU_EXTENSION_RISCV_M, -- implement muld/div extension?
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CPU_EXTENSION_RISCV_M => CPU_EXTENSION_RISCV_M, -- implement muld/div extension?
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CPU_EXTENSION_RISCV_U => CPU_EXTENSION_RISCV_U, -- implement user mode extension?
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CPU_EXTENSION_RISCV_U => CPU_EXTENSION_RISCV_U, -- implement user mode extension?
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CPU_EXTENSION_RISCV_Zbb => CPU_EXTENSION_RISCV_Zbb,-- implement basic bit-manipulation sub-extension?
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CPU_EXTENSION_RISCV_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
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CPU_EXTENSION_RISCV_Zfinx => true, -- implement 32-bit floating-point extension (using INT reg!)
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CPU_EXTENSION_RISCV_Zicsr => CPU_EXTENSION_RISCV_Zicsr, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr => CPU_EXTENSION_RISCV_Zicsr, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicntr => true, -- implement base counters?
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CPU_EXTENSION_RISCV_Zihpm => true, -- implement hardware performance monitors?
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CPU_EXTENSION_RISCV_Zifencei => CPU_EXTENSION_RISCV_Zifencei, -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei => CPU_EXTENSION_RISCV_Zifencei, -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zmmul => false, -- implement multiply-only M sub-extension?
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CPU_EXTENSION_RISCV_Zmmul => false, -- implement multiply-only M sub-extension?
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-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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