| Line 5... |
Line 5... |
-- # Use the "User Configuration" section to configure the testbench according to your needs. #
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-- # Use the "User Configuration" section to configure the testbench according to your needs. #
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-- # See NEORV32 data sheet for more information. #
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-- # See NEORV32 data sheet for more information. #
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-- # ********************************************************************************************* #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License #
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-- # BSD 3-Clause License #
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-- # #
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-- # #
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-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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-- # #
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-- # #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # Redistribution and use in source and binary forms, with or without modification, are #
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-- # permitted provided that the following conditions are met: #
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-- # permitted provided that the following conditions are met: #
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-- # #
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-- # #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
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| Line 238... |
Line 238... |
IO_CFS_CONFIG => (others => '0'), -- custom CFS configuration generic
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IO_CFS_CONFIG => (others => '0'), -- custom CFS configuration generic
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IO_CFS_IN_SIZE => 32, -- size of CFS input conduit in bits
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IO_CFS_IN_SIZE => 32, -- size of CFS input conduit in bits
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IO_CFS_OUT_SIZE => 32, -- size of CFS output conduit in bits
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IO_CFS_OUT_SIZE => 32, -- size of CFS output conduit in bits
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IO_NEOLED_EN => true, -- implement NeoPixel-compatible smart LED interface (NEOLED)?
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IO_NEOLED_EN => true, -- implement NeoPixel-compatible smart LED interface (NEOLED)?
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IO_NEOLED_TX_FIFO => 8, -- NEOLED TX FIFO depth, 1..32k, has to be a power of two
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IO_NEOLED_TX_FIFO => 8, -- NEOLED TX FIFO depth, 1..32k, has to be a power of two
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IO_GPTMR_EN => true -- implement general purpose timer (GPTMR)?
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IO_GPTMR_EN => true, -- implement general purpose timer (GPTMR)?
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IO_XIP_EN => true -- implement execute in place module (XIP)?
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)
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)
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port map (
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port map (
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-- Global control --
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-- Global control --
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clk_i => clk_gen, -- global clock, rising edge
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clk_i => clk_gen, -- global clock, rising edge
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rstn_i => rst_gen, -- global reset, low-active, async
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rstn_i => rst_gen, -- global reset, low-active, async
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| Line 265... |
Line 266... |
wb_ack_i => wb_cpu.ack, -- transfer acknowledge
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wb_ack_i => wb_cpu.ack, -- transfer acknowledge
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wb_err_i => wb_cpu.err, -- transfer error
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wb_err_i => wb_cpu.err, -- transfer error
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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-- Advanced memory control signals (available if MEM_EXT_EN = true) --
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fence_o => open, -- indicates an executed FENCE operation
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fence_o => open, -- indicates an executed FENCE operation
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fencei_o => open, -- indicates an executed FENCEI operation
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fencei_o => open, -- indicates an executed FENCEI operation
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-- XIP (execute in place via SPI) signals (available if IO_XIP_EN = true) --
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xip_csn_o => open, -- chip-select, low-active
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xip_clk_o => open, -- serial clock
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xip_sdi_i => '0', -- device data input
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xip_sdo_o => open, -- controller data output
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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-- TX stream interfaces (available if SLINK_NUM_TX > 0) --
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slink_tx_dat_o => slink_dat, -- output data
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slink_tx_dat_o => slink_dat, -- output data
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slink_tx_val_o => slink_val, -- valid output
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slink_tx_val_o => slink_val, -- valid output
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slink_tx_rdy_i => slink_rdy, -- ready to send
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slink_tx_rdy_i => slink_rdy, -- ready to send
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-- RX stream interfaces (available if SLINK_NUM_RX > 0) --
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-- RX stream interfaces (available if SLINK_NUM_RX > 0) --
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