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Line 1... |
// #################################################################################################
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// #################################################################################################
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// # << NEORV32 - Bootloader >> #
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// # << NEORV32 - Bootloader >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # In order to run the bootloader on any CPU configuration, the bootloader should be compiled #
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// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled #
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// # unsing the base ISA (rv32i/rv32e) only. #
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// # unsing the base ISA (rv32i/rv32e) only. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # #
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// # #
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// # The bootloader uses the primary UART (UART0) for user console interface. #
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// # The bootloader uses the primary UART (UART0) for user console interface. #
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// # -> Try booting from SPI flash at spi_csn_o(0). #
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// # -> Try booting from SPI flash at spi_csn_o(0). #
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// # -> Permanently light up status led and stall CPU if SPI flash booting attempt fails. #
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// # -> Permanently light up status led and stall CPU if SPI flash booting attempt fails. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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neorv32_uart_print("\n\n\n\n<< NEORV32 Bootloader >>\n\n"
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neorv32_uart_print("\n\n\n\n<< NEORV32 Bootloader >>\n\n"
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"BLDV: "__DATE__"\nHWV: ");
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"BLDV: "__DATE__"\nHWV: ");
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print_hex_word(neorv32_cpu_csr_read(CSR_MIMPID));
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print_hex_word(neorv32_cpu_csr_read(CSR_MIMPID));
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neorv32_uart_print("\nCLK: ");
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neorv32_uart_print("\nCLK: ");
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print_hex_word(SYSINFO_CLK);
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print_hex_word(SYSINFO_CLK);
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neorv32_uart_print(" Hz\nUSER: ");
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neorv32_uart_print("\nUSER: ");
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print_hex_word(SYSINFO_USER_CODE);
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print_hex_word(SYSINFO_USER_CODE);
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neorv32_uart_print("\nMISA: ");
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neorv32_uart_print("\nMISA: ");
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print_hex_word(neorv32_cpu_csr_read(CSR_MISA));
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print_hex_word(neorv32_cpu_csr_read(CSR_MISA));
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neorv32_uart_print("\nZEXT: ");
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print_hex_word(neorv32_cpu_csr_read(CSR_MZEXT));
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neorv32_uart_print("\nPROC: ");
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neorv32_uart_print("\nPROC: ");
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print_hex_word(SYSINFO_FEATURES);
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print_hex_word(SYSINFO_FEATURES);
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neorv32_uart_print("\nIMEM: ");
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neorv32_uart_print("\nIMEM: ");
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print_hex_word(SYSINFO_IMEM_SIZE);
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print_hex_word(SYSINFO_IMEM_SIZE);
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neorv32_uart_print(" bytes @ ");
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neorv32_uart_print(" bytes @ ");
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