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// #################################################################################################
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// #################################################################################################
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// # << NEORV32 - Bootloader >> #
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// # << NEORV32 - Bootloader >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled #
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// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled #
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// # unsing the base ISA (rv32i/rv32e) only. #
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// # using the base ISA (rv32i/rv32e) only. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # Bootloader executables (neorv32_exe.bin) are LITTLE-ENDIAN! #
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// # #
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// # #
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// # The bootloader uses the primary UART (UART0) for user console interface. #
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// # The bootloader uses the primary UART (UART0) for user console interface. #
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// # #
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// # #
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// # UART configuration: 8 data bits, NO parity bit, 1 stop bit, 19200 baud (19200-8N1) #
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// # UART configuration: 8 data bits, NO parity bit, 1 stop bit, 19200 baud (19200-8N1) #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0) #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0) #
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neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
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neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
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// Configure machine system timer interrupt for ~2Hz
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// Configure machine system timer interrupt for ~2Hz
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
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// confiure trap handler (bare-metal, no neorv32 rte available)
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// configure trap handler (bare-metal, no neorv32 rte available)
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neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
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neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
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// active timer IRQ
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// active timer IRQ
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source
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neorv32_cpu_eint(); // enable global interrupts
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neorv32_cpu_eint(); // enable global interrupts
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get_exe(EXE_STREAM_FLASH);
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get_exe(EXE_STREAM_FLASH);
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neorv32_uart_print("\n");
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neorv32_uart_print("\n");
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start_app();
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start_app();
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return 0;
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return 1; // bootloader should never return
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#endif
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#endif
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// ------------------------------------------------
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// ------------------------------------------------
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// Show bootloader intro and system info
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// Show bootloader intro and system info
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else { // unknown command
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else { // unknown command
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neorv32_uart_print("Invalid CMD");
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neorv32_uart_print("Invalid CMD");
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}
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}
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}
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}
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return 0; // bootloader should never return
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return 1; // bootloader should never return
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* Get executable stream and execute it.
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* Get executable stream and execute it.
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} data;
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} data;
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uint32_t i;
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uint32_t i;
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for (i=0; i<4; i++) {
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for (i=0; i<4; i++) {
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if (src == EXE_STREAM_UART) {
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if (src == EXE_STREAM_UART) {
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data.uint8[3-i] = (uint8_t)neorv32_uart_getc();
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data.uint8[i] = (uint8_t)neorv32_uart_getc();
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}
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}
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else {
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else {
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data.uint8[3-i] = spi_flash_read_byte(addr + i);
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data.uint8[i] = spi_flash_read_byte(addr + i);
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}
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}
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}
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}
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return data.uint32;
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return data.uint32;
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}
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}
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data.uint32 = wdata;
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data.uint32 = wdata;
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int i;
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int i;
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for (i=0; i<4; i++) {
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for (i=0; i<4; i++) {
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spi_flash_write_byte(addr + i, data.uint8[3-i]);
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spi_flash_write_byte(addr + i, data.uint8[i]);
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}
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}
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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