| Line 1... |
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// #################################################################################################
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// #################################################################################################
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// # << NEORV32 - Bootloader >> #
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// # << NEORV32 - Bootloader >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # In order to run the bootloader on *any* CPU configuration, the bootloader should be compiled #
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// # using the base ISA (rv32i/rv32e) only. #
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// # ********************************************************************************************* #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # Bootloader executables (neorv32_exe.bin) are LITTLE-ENDIAN! #
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// # #
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// # The bootloader uses the primary UART (UART0) for user console interface. #
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// # #
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// # UART configuration: 8 data bits, NO parity bit, 1 stop bit, 19200 baud (19200-8N1) #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0) #
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// # neorv32.gpio_o(0) is used as high-active status LED (can be disabled via #STATUS_LED_EN). #
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// # #
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// # Auto boot sequence (can be disabled via #AUTOBOOT_EN) after timeout (via #AUTOBOOT_TIMEOUT): #
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// # -> Try booting from SPI flash at spi_csn_o(0). #
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// # -> Permanently light up status led and stall CPU if SPI flash booting attempt fails. #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// # The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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// #################################################################################################
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/**********************************************************************//**
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/**********************************************************************//**
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* @file bootloader.c
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* @file bootloader.c
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* @author Stephan Nolting
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* @author Stephan Nolting
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* @brief Default NEORV32 bootloader.
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* @brief NEORV32 bootloader.
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**************************************************************************/
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**************************************************************************/
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// Libraries
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// Libraries
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#include <stdint.h>
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#include <stdint.h>
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#include <neorv32.h>
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#include <neorv32.h>
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/**********************************************************************//**
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/**********************************************************************//**
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* @name User configuration
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* @name Bootloader configuration (override via console to customize)
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* default values are used if not explicitly customized
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**************************************************************************/
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**************************************************************************/
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/**@{*/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE (19200)
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/* ---- UART interface configuration ---- */
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/** Enable auto-boot sequence if != 0 */
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#define AUTOBOOT_EN (1)
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/** Set to 0 to disable UART interface */
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/** Time until the auto-boot sequence starts (in seconds) */
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#ifndef UART_EN
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#define AUTOBOOT_TIMEOUT (8)
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#define UART_EN 1
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/** Set to 0 to disable bootloader status LED */
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#endif
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#define STATUS_LED_EN (1)
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/** Set to 1 to enable SPI direct boot (disables the entire user console!) */
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/** UART BAUD rate for serial interface */
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#define SPI_DIRECT_BOOT_EN (0)
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#ifndef UART_BAUD
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/** Bootloader status LED at GPIO output port */
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#define UART_BAUD 19200
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#define STATUS_LED (0)
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#endif
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/** SPI flash boot image base address (warning! address might wrap-around!) */
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#define SPI_FLASH_BOOT_ADR (0x00800000)
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/* ---- Status LED ---- */
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/** SPI flash chip select line at spi_csn_o */
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#define SPI_FLASH_CS (0)
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/** Set to 0 to disable bootloader status LED (heart beat) at GPIO.gpio_o(STATUS_LED_PIN) */
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/** Default SPI flash clock prescaler */
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#ifndef STATUS_LED_EN
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#define SPI_FLASH_CLK_PRSC (CLK_PRSC_8)
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#define STATUS_LED_EN 1
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/** SPI flash sector size in bytes (default = 64kb) */
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#endif
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#define SPI_FLASH_SECTOR_SIZE (64*1024)
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/** ASCII char to start fast executable upload process (for use with automatic upload scripts) */
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/** GPIO output pin for high-active bootloader status LED (heart beat) */
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#define FAST_UPLOAD_CMD ('#')
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#ifndef STATUS_LED_PIN
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#define STATUS_LED_PIN 0
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#endif
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/* ---- Boot configuration ---- */
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/** Set to 1 to enable automatic (after reset) boot from external SPI flash at address SPI_BOOT_BASE_ADDR */
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#ifndef AUTO_BOOT_SPI_EN
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#define AUTO_BOOT_SPI_EN 0
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#endif
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/** Set to 1 to enable boot via on-chip debugger (keep CPU in halt loop until OCD takes over control) */
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#ifndef AUTO_BOOT_OCD_EN
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#define AUTO_BOOT_OCD_EN 0
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#endif
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/** Time until the auto-boot sequence starts (in seconds); 0 = disabled */
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#ifndef AUTO_BOOT_TIMEOUT
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#define AUTO_BOOT_TIMEOUT 8
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#endif
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/* ---- SPI configuration ---- */
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/** SPI flash chip select (low-active) at SPI.spi_csn_o(SPI_FLASH_CS) */
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#ifndef SPI_FLASH_CS
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#define SPI_FLASH_CS 0
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#endif
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/** SPI flash sector size in bytes */
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#ifndef SPI_FLASH_SECTOR_SIZE
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#define SPI_FLASH_SECTOR_SIZE 65536 // default = 64kB
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#endif
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/** SPI flash clock pre-scaler; see #NEORV32_TWI_CT_enum */
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#ifndef SPI_FLASH_CLK_PRSC
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#define SPI_FLASH_CLK_PRSC CLK_PRSC_8
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#endif
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/** SPI flash boot base address */
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#ifndef SPI_BOOT_BASE_ADDR
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#define SPI_BOOT_BASE_ADDR 0x08000000
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#endif
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/**@}*/
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/**@}*/
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/**********************************************************************//**
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/**********************************************************************//**
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Executable stream source select
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Executable stream source select
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| Line 103... |
Line 129... |
**************************************************************************/
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**************************************************************************/
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enum ERROR_CODES {
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enum ERROR_CODES {
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ERROR_SIGNATURE = 0, /**< 0: Wrong signature in executable */
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ERROR_SIGNATURE = 0, /**< 0: Wrong signature in executable */
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ERROR_SIZE = 1, /**< 1: Insufficient instruction memory capacity */
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ERROR_SIZE = 1, /**< 1: Insufficient instruction memory capacity */
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ERROR_CHECKSUM = 2, /**< 2: Checksum error in executable */
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ERROR_CHECKSUM = 2, /**< 2: Checksum error in executable */
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ERROR_FLASH = 3, /**< 3: SPI flash access error */
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ERROR_FLASH = 3 /**< 3: SPI flash access error */
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ERROR_ROM = 4, /**< 4: Instruction memory is marked as read-only */
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ERROR_SYSTEM = 5 /**< 5: System exception */
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};
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};
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/**********************************************************************//**
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/**********************************************************************//**
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* SPI flash commands
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* SPI flash commands
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| Line 140... |
Line 164... |
**************************************************************************/
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**************************************************************************/
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#define EXE_SIGNATURE 0x4788CAFE
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#define EXE_SIGNATURE 0x4788CAFE
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/**********************************************************************//**
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/**********************************************************************//**
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* String output helper macros.
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* Helper macros
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**************************************************************************/
|
**************************************************************************/
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/**@{*/
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/**@{*/
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/* Actual define-to-string helper */
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/** Actual define-to-string helper */
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#define xstr(a) str(a)
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#define xstr(a) str(a)
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/* Internal helper macro */
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/** Internal helper macro */
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#define str(a) #a
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#define str(a) #a
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/** Print to UART 0 */
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#if (UART_EN != 0)
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#define PRINT_TEXT(...) neorv32_uart0_print(__VA_ARGS__)
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#define PRINT_XNUM(a) print_hex_word(a)
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#define PRINT_GETC(a) neorv32_uart0_getc()
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#define PRINT_PUTC(a) neorv32_uart0_putc(a)
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#else
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#define PRINT_TEXT(...)
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#define PRINT_XNUM(a)
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#define PRINT_GETC(a) 0
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#define PRINT_PUTC(a)
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#endif
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/**@}*/
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/**@}*/
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/**********************************************************************//**
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/**********************************************************************//**
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* This global variable keeps the size of the available executable in bytes.
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* This global variable keeps the size of the available executable in bytes.
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Line 194... |
**************************************************************************/
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**************************************************************************/
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volatile uint32_t exe_available = 0;
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volatile uint32_t exe_available = 0;
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/**********************************************************************//**
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/**********************************************************************//**
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* Only set during executable fetch (required for cpaturing STORE-BUS-TIMOUT exception).
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* Only set during executable fetch (required for capturing STORE BUS-TIMOUT exception).
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**************************************************************************/
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**************************************************************************/
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volatile uint32_t getting_exe = 0;
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volatile uint32_t getting_exe = 0;
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// Function prototypes
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// Function prototypes
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void __attribute__((__interrupt__)) bootloader_trap_handler(void);
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void __attribute__((__interrupt__)) bootloader_trap_handler(void);
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void fast_upload(int src);
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void print_help(void);
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void print_help(void);
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void start_app(void);
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void start_app(void);
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void get_exe(int src);
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void get_exe(int src);
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void save_exe(void);
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void save_exe(void);
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uint32_t get_exe_word(int src, uint32_t addr);
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uint32_t get_exe_word(int src, uint32_t addr);
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Line 221... |
void spi_flash_write_enable(void);
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void spi_flash_write_enable(void);
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void spi_flash_write_addr(uint32_t addr);
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void spi_flash_write_addr(uint32_t addr);
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/**********************************************************************//**
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/**********************************************************************//**
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* Sanity check: Base ISA only!
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**************************************************************************/
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#if defined __riscv_atomic || defined __riscv_a || __riscv_b || __riscv_compressed || defined __riscv_c || defined __riscv_mul || defined __riscv_m
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#warning In order to allow the bootloader to run on *any* CPU configuration it should be compiled using the base ISA only.
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#endif
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/**********************************************************************//**
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* Bootloader main.
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* Bootloader main.
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**************************************************************************/
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**************************************************************************/
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int main(void) {
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int main(void) {
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// check ISA
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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#if defined __riscv_atomic || defined __riscv_a || __riscv_b || __riscv_compressed || defined __riscv_c || defined __riscv_mul || defined __riscv_m
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// AUTO BOOT: OCD
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#warning In order to allow the bootloader to run on *ANY* CPU configuration it should be compiled using the base ISA (rv32i/e) only.
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// Stay in endless loop until the on-chip debugger
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// takes over CPU control
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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#if (AUTO_BOOT_OCD_EN != 0)
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#warning Boot configuration: Boot via on-chip debugger.
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while(1) {
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asm volatile ("nop");
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}
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return 0; // should never be reached
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#endif
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#endif
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// AUTO BOOT: SPI flash
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// Bootloader will directly boot and execute image from SPI flash
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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#if (AUTO_BOOT_SPI_EN != 0)
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#warning Boot configuration: Auto boot from external SPI flash.
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PRINT_TEXT("\nNEORV32 bootloader\nLoading from SPI flash at ");
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PRINT_XNUM((uint32_t)SPI_BOOT_BASE_ADDR);
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PRINT_TEXT("...\n");
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get_exe(EXE_STREAM_FLASH);
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PRINT_TEXT("\n");
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start_app();
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return 0; // bootloader should never return
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#endif
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// AUTO BOOT: Default
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// User UART to upload new executable and optionally store it to SPI flash
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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exe_available = 0; // global variable for executable size; 0 means there is no exe available
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exe_available = 0; // global variable for executable size; 0 means there is no exe available
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getting_exe = 0; // we are not trying to get an executable yet
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getting_exe = 0; // we are not trying to get an executable yet
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// ------------------------------------------------
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// Minimal processor hardware initialization
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// - all IO devices are reset and disabled by the crt0 code
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|
// ------------------------------------------------
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// get clock speed (in Hz)
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// configure trap handler (bare-metal, no neorv32 rte available)
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uint32_t clock_speed = SYSINFO_CLK;
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neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
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// init SPI for 8-bit, clock-mode 0
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// setup SPI for 8-bit, clock-mode 0
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if (clock_speed < 40000000) {
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neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0);
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neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0);
|
}
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else {
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neorv32_spi_setup(CLK_PRSC_128, 0, 0);
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}
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#if (STATUS_LED_EN != 0)
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
|
// activate status LED, clear all others
|
// activate status LED, clear all others
|
neorv32_gpio_port_set(1 << STATUS_LED);
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neorv32_gpio_port_set(1 << STATUS_LED_PIN);
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}
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#endif
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#endif
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|
// init UART (no parity bit, no hardware flow control)
|
#if (UART_EN != 0)
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neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
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// setup UART0 (primary UART, no parity bit, no hardware flow control)
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neorv32_uart0_setup(UART_BAUD, PARITY_NONE, FLOW_CONTROL_NONE);
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#endif
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// Configure machine system timer interrupt for ~2Hz
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// Configure machine system timer interrupt for ~2Hz
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
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if (neorv32_mtime_available()) {
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
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// configure trap handler (bare-metal, no neorv32 rte available)
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neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
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|
// active timer IRQ
|
// active timer IRQ
|
neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source only!
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neorv32_cpu_eint(); // enable global interrupts
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neorv32_cpu_eint(); // enable global interrupts
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}
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|
// ------------------------------------------------
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|
// Fast boot mode: Direct SPI boot
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|
// Bootloader will directly boot and execute image from SPI memory.
|
|
// No user UART console is available in this mode!
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|
// ------------------------------------------------
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|
#if (SPI_DIRECT_BOOT_EN != 0)
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|
#warning Compiling bootloader in 'SPI direct boot mode'. Bootloader will directly boot from SPI memory. No user UART console will be available.
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neorv32_uart_print("\nNEORV32 bootloader\nAccessing SPI flash at ");
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print_hex_word((uint32_t)SPI_FLASH_BOOT_ADR);
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neorv32_uart_print("\n");
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|
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get_exe(EXE_STREAM_FLASH);
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neorv32_uart_print("\n");
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start_app();
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return 1; // bootloader should never return
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|
#endif
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|
// ------------------------------------------------
|
// ------------------------------------------------
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// Show bootloader intro and system info
|
// Show bootloader intro and system info
|
// ------------------------------------------------
|
// ------------------------------------------------
|
neorv32_uart_print("\n\n\n\n<< NEORV32 Bootloader >>\n\n"
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PRINT_TEXT("\n\n\n<< NEORV32 Bootloader >>\n\n"
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"BLDV: "__DATE__"\nHWV: ");
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"BLDV: "__DATE__"\nHWV: ");
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print_hex_word(neorv32_cpu_csr_read(CSR_MIMPID));
|
PRINT_XNUM(neorv32_cpu_csr_read(CSR_MIMPID));
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neorv32_uart_print("\nCLK: ");
|
PRINT_TEXT("\nCLK: ");
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print_hex_word(SYSINFO_CLK);
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PRINT_XNUM(SYSINFO_CLK);
|
neorv32_uart_print("\nUSER: ");
|
PRINT_TEXT("\nMISA: ");
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print_hex_word(SYSINFO_USER_CODE);
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MISA));
|
neorv32_uart_print("\nMISA: ");
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PRINT_TEXT("\nZEXT: ");
|
print_hex_word(neorv32_cpu_csr_read(CSR_MISA));
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MZEXT));
|
neorv32_uart_print("\nZEXT: ");
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PRINT_TEXT("\nPROC: ");
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print_hex_word(neorv32_cpu_csr_read(CSR_MZEXT));
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PRINT_XNUM(SYSINFO_FEATURES);
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neorv32_uart_print("\nPROC: ");
|
PRINT_TEXT("\nIMEM: ");
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print_hex_word(SYSINFO_FEATURES);
|
PRINT_XNUM(SYSINFO_IMEM_SIZE);
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neorv32_uart_print("\nIMEM: ");
|
PRINT_TEXT(" bytes @");
|
print_hex_word(SYSINFO_IMEM_SIZE);
|
PRINT_XNUM(SYSINFO_ISPACE_BASE);
|
neorv32_uart_print(" bytes @ ");
|
PRINT_TEXT("\nDMEM: ");
|
print_hex_word(SYSINFO_ISPACE_BASE);
|
PRINT_XNUM(SYSINFO_DMEM_SIZE);
|
neorv32_uart_print("\nDMEM: ");
|
PRINT_TEXT(" bytes @");
|
print_hex_word(SYSINFO_DMEM_SIZE);
|
PRINT_XNUM(SYSINFO_DSPACE_BASE);
|
neorv32_uart_print(" bytes @ ");
|
|
print_hex_word(SYSINFO_DSPACE_BASE);
|
|
|
|
|
|
// ------------------------------------------------
|
// ------------------------------------------------
|
// Auto boot sequence
|
// Auto boot sequence
|
// ------------------------------------------------
|
// ------------------------------------------------
|
#if (AUTOBOOT_EN != 0)
|
# if (AUTO_BOOT_TIMEOUT != 0)
|
neorv32_uart_print("\n\nAutoboot in "xstr(AUTOBOOT_TIMEOUT)"s. Press key to abort.\n");
|
if (neorv32_mtime_available()) {
|
|
|
uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTOBOOT_TIMEOUT * clock_speed);
|
PRINT_TEXT("\n\nAutoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press key to abort.\n");
|
|
uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTO_BOOT_TIMEOUT * SYSINFO_CLK);
|
|
|
while (neorv32_uart_char_received() == 0) { // wait for any key to be pressed
|
while(1){
|
|
|
if (neorv32_mtime_get_time() >= timeout_time) { // timeout? start auto boot sequence
|
if (neorv32_uart0_available()) { // wait for any key to be pressed
|
fast_upload(EXE_STREAM_FLASH); // try booting from flash
|
if (neorv32_uart0_char_received()) {
|
|
break;
|
|
}
|
}
|
}
|
|
|
|
if (neorv32_mtime_get_time() >= timeout_time) { // timeout? start auto boot sequence
|
|
get_exe(EXE_STREAM_FLASH); // try booting from flash
|
|
PRINT_TEXT("\n");
|
|
start_app();
|
|
while(1);
|
}
|
}
|
neorv32_uart_print("Aborted.\n\n");
|
|
|
|
// fast executable upload?
|
}
|
if (neorv32_uart_char_received_get() == FAST_UPLOAD_CMD) {
|
PRINT_TEXT("Aborted.\n\n");
|
fast_upload(EXE_STREAM_UART);
|
|
}
|
}
|
#else
|
#else
|
neorv32_uart_print("\n\n");
|
PRINT_TEXT("Aborted.\n\n");
|
#endif
|
#endif
|
|
|
print_help();
|
print_help();
|
|
|
|
|
// ------------------------------------------------
|
// ------------------------------------------------
|
// Bootloader console
|
// Bootloader console
|
// ------------------------------------------------
|
// ------------------------------------------------
|
while (1) {
|
while (1) {
|
|
|
neorv32_uart_print("\nCMD:> ");
|
PRINT_TEXT("\nCMD:> ");
|
char c = neorv32_uart_getc();
|
char c = PRINT_GETC();
|
neorv32_uart_putc(c); // echo
|
PRINT_PUTC(c); // echo
|
neorv32_uart_print("\n");
|
PRINT_TEXT("\n");
|
|
|
if (c == FAST_UPLOAD_CMD) { // fast executable upload
|
if (c == 'r') { // restart bootloader
|
fast_upload(EXE_STREAM_UART);
|
|
}
|
|
else if (c == 'r') { // restart bootloader
|
|
asm volatile ("li t0, %[input_i]; jr t0" : : [input_i] "i" (BOOTLOADER_BASE_ADDRESS)); // jump to beginning of boot ROM
|
asm volatile ("li t0, %[input_i]; jr t0" : : [input_i] "i" (BOOTLOADER_BASE_ADDRESS)); // jump to beginning of boot ROM
|
}
|
}
|
else if (c == 'h') { // help menu
|
else if (c == 'h') { // help menu
|
print_help();
|
print_help();
|
}
|
}
|
| Line 334... |
Line 385... |
save_exe();
|
save_exe();
|
}
|
}
|
else if (c == 'l') { // get executable from flash
|
else if (c == 'l') { // get executable from flash
|
get_exe(EXE_STREAM_FLASH);
|
get_exe(EXE_STREAM_FLASH);
|
}
|
}
|
else if (c == 'e') { // start application program
|
else if (c == 'e') { // start application program // executable available?
|
|
if (exe_available == 0) {
|
|
PRINT_TEXT("No executable available.");
|
|
}
|
|
else {
|
start_app();
|
start_app();
|
}
|
}
|
|
}
|
else { // unknown command
|
else { // unknown command
|
neorv32_uart_print("Invalid CMD");
|
PRINT_TEXT("Invalid CMD");
|
}
|
}
|
}
|
}
|
|
|
return 1; // bootloader should never return
|
return 1; // bootloader should never return
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Get executable stream and execute it.
|
|
*
|
|
* @param src Source of executable stream data. See #EXE_STREAM_SOURCE.
|
|
**************************************************************************/
|
|
void fast_upload(int src) {
|
|
|
|
get_exe(src);
|
|
neorv32_uart_print("\n");
|
|
start_app();
|
|
while(1);
|
|
}
|
|
|
|
|
|
/**********************************************************************//**
|
|
* Print help menu.
|
* Print help menu.
|
**************************************************************************/
|
**************************************************************************/
|
void print_help(void) {
|
void print_help(void) {
|
|
|
neorv32_uart_print("Available CMDs:\n"
|
PRINT_TEXT("Available CMDs:\n"
|
" h: Help\n"
|
" h: Help\n"
|
" r: Restart\n"
|
" r: Restart\n"
|
" u: Upload\n"
|
" u: Upload\n"
|
" s: Store to flash\n"
|
" s: Store to flash\n"
|
" l: Load from flash\n"
|
" l: Load from flash\n"
|
| Line 380... |
Line 422... |
/**********************************************************************//**
|
/**********************************************************************//**
|
* Start application program at the beginning of instruction space.
|
* Start application program at the beginning of instruction space.
|
**************************************************************************/
|
**************************************************************************/
|
void start_app(void) {
|
void start_app(void) {
|
|
|
// executable available?
|
|
if (exe_available == 0) {
|
|
neorv32_uart_print("No executable available.");
|
|
return;
|
|
}
|
|
|
|
// no need to shut down/reset the used peripherals
|
|
// no need to disable interrupt sources
|
|
// -> crt0 will do a clean CPU/processor reset/setup
|
|
|
|
// deactivate global IRQs
|
// deactivate global IRQs
|
neorv32_cpu_dint();
|
neorv32_cpu_dint();
|
|
|
neorv32_uart_print("Booting...\n\n");
|
PRINT_TEXT("Booting...\n\n");
|
|
|
// wait for UART to finish transmitting
|
// wait for UART to finish transmitting
|
while (neorv32_uart_tx_busy());
|
while (neorv32_uart0_tx_busy());
|
|
|
// start app at instruction space base address
|
// start app at instruction space base address
|
register uint32_t app_base = SYSINFO_ISPACE_BASE;
|
register uint32_t app_base = SYSINFO_ISPACE_BASE;
|
asm volatile ("jalr zero, %0" : : "r" (app_base));
|
asm volatile ("jalr zero, %0" : : "r" (app_base));
|
while (1);
|
while (1);
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Bootloader trap handler. Used for the MTIME tick and to capture any other traps.
|
* Bootloader trap handler. Used for the MTIME tick and to capture any other traps.
|
* @warning Since we have no runtime environment, we have to use the interrupt attribute here. Here and only here!
|
*
|
|
* @warning Adapt exception PC only for sync exceptions!
|
|
*
|
|
* @note Since we have no runtime environment, we have to use the interrupt attribute here. Here and only here!
|
**************************************************************************/
|
**************************************************************************/
|
void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
|
void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
|
|
|
uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
|
uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
|
|
|
// make sure this was caused by MTIME IRQ
|
// Machine timer interrupt
|
if (cause == TRAP_CODE_MTI) { // raw exception code for MTI
|
if (cause == TRAP_CODE_MTI) { // raw exception code for MTI
|
#if (STATUS_LED_EN != 0)
|
#if (STATUS_LED_EN != 0)
|
// toggle status LED
|
if (neorv32_gpio_available()) {
|
neorv32_gpio_pin_toggle(STATUS_LED);
|
neorv32_gpio_pin_toggle(STATUS_LED_PIN); // toggle status LED
|
|
}
|
#endif
|
#endif
|
// set time for next IRQ
|
// set time for next IRQ
|
|
if (neorv32_mtime_available()) {
|
neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
|
neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
|
}
|
}
|
else {
|
|
// store bus access error during get_exe
|
|
// -> seems like executable is too large
|
|
if ((cause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
|
|
system_error(ERROR_SIZE);
|
|
}
|
}
|
// unknown error
|
|
|
// Bus store access error during get_exe
|
|
else if ((cause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
|
|
system_error(ERROR_SIZE); // -> seems like executable is too large
|
|
}
|
|
|
|
// Anything else (that was not expected); output exception notifier and try to resume
|
else {
|
else {
|
neorv32_uart_print("\n\nEXCEPTION mcause=");
|
uint32_t epc = neorv32_cpu_csr_read(CSR_MEPC);
|
print_hex_word(cause);
|
#if (UART_EN != 0)
|
neorv32_uart_print(" @ pc=");
|
if (neorv32_uart0_available()) {
|
print_hex_word(neorv32_cpu_csr_read(CSR_MEPC));
|
PRINT_TEXT("\n[EXC ");
|
system_error(ERROR_SYSTEM);
|
PRINT_XNUM(cause); // MCAUSE
|
|
PRINT_PUTC(' ');
|
|
PRINT_XNUM(epc); // MEPC
|
|
PRINT_PUTC(' ');
|
|
PRINT_XNUM(neorv32_cpu_csr_read(CSR_MTVAL)); // MTVAL
|
|
PRINT_TEXT("]\n");
|
}
|
}
|
|
#endif
|
|
neorv32_cpu_csr_write(CSR_MEPC, epc + 4); // advance to next instruction
|
}
|
}
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
| Line 449... |
Line 494... |
**************************************************************************/
|
**************************************************************************/
|
void get_exe(int src) {
|
void get_exe(int src) {
|
|
|
getting_exe = 1; // to inform trap handler we were trying to get an executable
|
getting_exe = 1; // to inform trap handler we were trying to get an executable
|
|
|
// is MEM implemented and read-only?
|
|
if ((SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM_ROM)) &&
|
|
(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM))) {
|
|
system_error(ERROR_ROM);
|
|
}
|
|
|
|
// flash image base address
|
// flash image base address
|
uint32_t addr = SPI_FLASH_BOOT_ADR;
|
uint32_t addr = (uint32_t)SPI_BOOT_BASE_ADDR;
|
|
|
// get image from flash?
|
// get image from flash?
|
if (src == EXE_STREAM_UART) {
|
if (src == EXE_STREAM_UART) {
|
neorv32_uart_print("Awaiting neorv32_exe.bin... ");
|
PRINT_TEXT("Awaiting neorv32_exe.bin... ");
|
}
|
}
|
else {
|
else {
|
neorv32_uart_print("Loading... ");
|
PRINT_TEXT("Loading... ");
|
|
|
// check if SPI is available at all
|
// flash checks
|
if (neorv32_spi_available() == 0) {
|
if ((neorv32_spi_available() == 0) || // check if SPI is available at all
|
system_error(ERROR_FLASH);
|
(spi_flash_read_1st_id() == 0x00)) { // check if flash ready (or available at all)
|
}
|
|
|
|
// check if flash ready (or available at all)
|
|
if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
|
|
system_error(ERROR_FLASH);
|
system_error(ERROR_FLASH);
|
}
|
}
|
}
|
}
|
|
|
// check if valid image
|
// check if valid image
|
| Line 503... |
Line 538... |
// error during transfer?
|
// error during transfer?
|
if ((checksum + check) != 0) {
|
if ((checksum + check) != 0) {
|
system_error(ERROR_CHECKSUM);
|
system_error(ERROR_CHECKSUM);
|
}
|
}
|
else {
|
else {
|
neorv32_uart_print("OK");
|
PRINT_TEXT("OK");
|
exe_available = size; // store exe size
|
exe_available = size; // store exe size
|
}
|
}
|
|
|
getting_exe = 0; // to inform trap handler we are done getting an executable
|
getting_exe = 0; // to inform trap handler we are done getting an executable
|
}
|
}
|
| Line 520... |
Line 555... |
|
|
// size of last uploaded executable
|
// size of last uploaded executable
|
uint32_t size = exe_available;
|
uint32_t size = exe_available;
|
|
|
if (size == 0) {
|
if (size == 0) {
|
neorv32_uart_print("No executable available.");
|
PRINT_TEXT("No executable available.");
|
return;
|
return;
|
}
|
}
|
|
|
uint32_t addr = SPI_FLASH_BOOT_ADR;
|
uint32_t addr = (uint32_t)SPI_BOOT_BASE_ADDR;
|
|
|
// info and prompt
|
// info and prompt
|
neorv32_uart_print("Write 0x");
|
PRINT_TEXT("Write ");
|
print_hex_word(size);
|
PRINT_XNUM(size);
|
neorv32_uart_print(" bytes to SPI flash @ 0x");
|
PRINT_TEXT(" bytes to SPI flash @ ");
|
print_hex_word(addr);
|
PRINT_XNUM(addr);
|
neorv32_uart_print("? (y/n) ");
|
PRINT_TEXT("? (y/n) ");
|
|
|
char c = neorv32_uart_getc();
|
char c = PRINT_GETC();
|
neorv32_uart_putc(c);
|
PRINT_PUTC(c);
|
if (c != 'y') {
|
if (c != 'y') {
|
return;
|
return;
|
}
|
}
|
|
|
// check if flash ready (or available at all)
|
// check if flash ready (or available at all)
|
if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
|
if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
|
system_error(ERROR_FLASH);
|
system_error(ERROR_FLASH);
|
}
|
}
|
|
|
neorv32_uart_print("\nFlashing... ");
|
PRINT_TEXT("\nFlashing... ");
|
|
|
// clear memory before writing
|
// clear memory before writing
|
uint32_t num_sectors = (size / SPI_FLASH_SECTOR_SIZE) + 1; // clear at least 1 sector
|
uint32_t num_sectors = (size / (SPI_FLASH_SECTOR_SIZE)) + 1; // clear at least 1 sector
|
uint32_t sector = SPI_FLASH_BOOT_ADR;
|
uint32_t sector = (uint32_t)SPI_BOOT_BASE_ADDR;
|
while (num_sectors--) {
|
while (num_sectors--) {
|
spi_flash_erase_sector(sector);
|
spi_flash_erase_sector(sector);
|
sector += SPI_FLASH_SECTOR_SIZE;
|
sector += SPI_FLASH_SECTOR_SIZE;
|
}
|
}
|
|
|
| Line 575... |
Line 610... |
i++;
|
i++;
|
}
|
}
|
|
|
// write checksum (sum complement)
|
// write checksum (sum complement)
|
checksum = (~checksum) + 1;
|
checksum = (~checksum) + 1;
|
spi_flash_write_word(SPI_FLASH_BOOT_ADR + EXE_OFFSET_CHECKSUM, checksum);
|
spi_flash_write_word((uint32_t)SPI_BOOT_BASE_ADDR + EXE_OFFSET_CHECKSUM, checksum);
|
|
|
neorv32_uart_print("OK");
|
PRINT_TEXT("OK");
|
}
|
}
|
|
|
|
|
/**********************************************************************//**
|
/**********************************************************************//**
|
* Get word from executable stream
|
* Get word from executable stream
|
| Line 598... |
Line 633... |
} data;
|
} data;
|
|
|
uint32_t i;
|
uint32_t i;
|
for (i=0; i<4; i++) {
|
for (i=0; i<4; i++) {
|
if (src == EXE_STREAM_UART) {
|
if (src == EXE_STREAM_UART) {
|
data.uint8[i] = (uint8_t)neorv32_uart_getc();
|
data.uint8[i] = (uint8_t)PRINT_GETC();
|
}
|
}
|
else {
|
else {
|
data.uint8[i] = spi_flash_read_byte(addr + i);
|
data.uint8[i] = spi_flash_read_byte(addr + i);
|
}
|
}
|
}
|
}
|
| Line 616... |
Line 651... |
*
|
*
|
* @param[in] err_code Error code. See #ERROR_CODES.
|
* @param[in] err_code Error code. See #ERROR_CODES.
|
**************************************************************************/
|
**************************************************************************/
|
void system_error(uint8_t err_code) {
|
void system_error(uint8_t err_code) {
|
|
|
neorv32_uart_print("\a\nERROR_"); // output error code with annoying bell sound
|
PRINT_TEXT("\a\nERROR_"); // output error code with annoying bell sound
|
neorv32_uart_putc('0' + ((char)err_code)); // FIXME err_code should/must be below 10
|
PRINT_PUTC('0' + ((char)err_code));
|
|
|
neorv32_cpu_dint(); // deactivate IRQs
|
neorv32_cpu_dint(); // deactivate IRQs
|
if (STATUS_LED_EN == 1) {
|
#if (STATUS_LED_EN != 0)
|
neorv32_gpio_port_set(1 << STATUS_LED); // permanently light up status LED
|
if (neorv32_gpio_available()) {
|
|
neorv32_gpio_port_set(1 << STATUS_LED_PIN); // permanently light up status LED
|
}
|
}
|
|
#endif
|
|
|
while(1); // freeze
|
while(1); // freeze
|
}
|
}
|
|
|
|
|
| Line 635... |
Line 672... |
*
|
*
|
* @param[in] num Number to print as hexadecimal.
|
* @param[in] num Number to print as hexadecimal.
|
**************************************************************************/
|
**************************************************************************/
|
void print_hex_word(uint32_t num) {
|
void print_hex_word(uint32_t num) {
|
|
|
|
#if (UART_EN != 0)
|
static const char hex_symbols[16] = "0123456789abcdef";
|
static const char hex_symbols[16] = "0123456789abcdef";
|
|
|
neorv32_uart_print("0x");
|
PRINT_TEXT("0x");
|
|
|
int i;
|
int i;
|
for (i=0; i<8; i++) {
|
for (i=0; i<8; i++) {
|
uint32_t index = (num >> (28 - 4*i)) & 0xF;
|
uint32_t index = (num >> (28 - 4*i)) & 0xF;
|
neorv32_uart_putc(hex_symbols[index]);
|
PRINT_PUTC(hex_symbols[index]);
|
}
|
}
|
|
#endif
|
}
|
}
|
|
|
|
|
|
|
// -------------------------------------------------------------------------------------
|
// -------------------------------------------------------------------------------------
|
