OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [bootloader/] [bootloader.c] - Diff between revs 61 and 63

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 61 Rev 63
Line 74... Line 74...
  #define STATUS_LED_PIN 0
  #define STATUS_LED_PIN 0
#endif
#endif
 
 
/* ---- Boot configuration ---- */
/* ---- Boot configuration ---- */
 
 
/** Set to 1 to enable automatic (after reset) boot from external SPI flash at address SPI_BOOT_BASE_ADDR */
/** Set to 1 to enable automatic (after reset) only boot from external SPI flash at address SPI_BOOT_BASE_ADDR */
#ifndef AUTO_BOOT_SPI_EN
#ifndef AUTO_BOOT_SPI_EN
  #define AUTO_BOOT_SPI_EN 0
  #define AUTO_BOOT_SPI_EN 0
#endif
#endif
 
 
/** Set to 1 to enable boot via on-chip debugger (keep CPU in halt loop until OCD takes over control) */
/** Set to 1 to enable boot only via on-chip debugger (keep CPU in halt loop until OCD takes over control) */
#ifndef AUTO_BOOT_OCD_EN
#ifndef AUTO_BOOT_OCD_EN
  #define AUTO_BOOT_OCD_EN 0
  #define AUTO_BOOT_OCD_EN 0
#endif
#endif
 
 
 
/** Set to 1 to enable simple UART executable upload (no console, no SPI flash) */
 
#ifndef AUTO_BOOT_SIMPLE_UART_EN
 
  #define AUTO_BOOT_SIMPLE_UART_EN 0
 
#endif
 
 
/** Time until the auto-boot sequence starts (in seconds); 0 = disabled */
/** Time until the auto-boot sequence starts (in seconds); 0 = disabled */
#ifndef AUTO_BOOT_TIMEOUT
#ifndef AUTO_BOOT_TIMEOUT
  #define AUTO_BOOT_TIMEOUT 8
  #define AUTO_BOOT_TIMEOUT 8
#endif
#endif
 
 
/* ---- SPI configuration ---- */
/* ---- SPI configuration ---- */
 
 
 
/** Enable SPI module (default) including SPI flash boot options */
 
#ifndef SPI_EN
 
  #define SPI_EN 1
 
#endif
 
 
/** SPI flash chip select (low-active) at SPI.spi_csn_o(SPI_FLASH_CS) */
/** SPI flash chip select (low-active) at SPI.spi_csn_o(SPI_FLASH_CS) */
#ifndef SPI_FLASH_CS
#ifndef SPI_FLASH_CS
  #define SPI_FLASH_CS 0
  #define SPI_FLASH_CS 0
#endif
#endif
 
 
Line 239... Line 249...
  // AUTO BOOT: OCD
  // AUTO BOOT: OCD
  // Stay in endless loop until the on-chip debugger
  // Stay in endless loop until the on-chip debugger
  // takes over CPU control
  // takes over CPU control
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#if (AUTO_BOOT_OCD_EN != 0)
#if (AUTO_BOOT_OCD_EN != 0)
  #warning Boot configuration: Boot via on-chip debugger.
  #warning Custom boot configuration: Boot via on-chip debugger.
  while(1) {
  while(1) {
    asm volatile ("nop");
    asm volatile ("nop");
  }
  }
  return 0; // should never be reached
  return 0; // should never be reached
#endif
#endif
 
 
 
 
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  // AUTO BOOT: SPI flash
  // AUTO BOOT: Simple UART boot
 
  // Upload executable via simple UART interface, no console, no flash options
 
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 
#if (AUTO_BOOT_SIMPLE_UART_EN != 0)
 
  #warning Custom boot configuration: Auto boot via simple UART interface.
 
 
 
  // setup UART0 (primary UART, no parity bit, no hardware flow control)
 
  neorv32_uart0_setup(UART_BAUD, PARITY_NONE, FLOW_CONTROL_NONE);
 
 
 
  PRINT_TEXT("\nNEORV32 bootloader\nUART executable upload\n");
 
  get_exe(EXE_STREAM_UART);
 
  PRINT_TEXT("\n");
 
  start_app();
 
 
 
  return 0; // bootloader should never return
 
#endif
 
 
 
 
 
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 
  // AUTO BOOT: SPI flash only
  // Bootloader will directly boot and execute image from SPI flash
  // Bootloader will directly boot and execute image from SPI flash
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
  // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#if (AUTO_BOOT_SPI_EN != 0)
#if (AUTO_BOOT_SPI_EN != 0)
  #warning Boot configuration: Auto boot from external SPI flash.
  #warning Custom boot configuration: Auto boot from external SPI flash.
 
 
 
  // setup UART0 (primary UART, no parity bit, no hardware flow control)
 
  neorv32_uart0_setup(UART_BAUD, PARITY_NONE, FLOW_CONTROL_NONE);
 
  // SPI setup
 
  neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0);
 
 
  PRINT_TEXT("\nNEORV32 bootloader\nLoading from SPI flash at ");
  PRINT_TEXT("\nNEORV32 bootloader\nLoading from SPI flash at ");
  PRINT_XNUM((uint32_t)SPI_BOOT_BASE_ADDR);
  PRINT_XNUM((uint32_t)SPI_BOOT_BASE_ADDR);
  PRINT_TEXT("...\n");
  PRINT_TEXT("...\n");
 
 
Line 278... Line 312...
 
 
 
 
  // configure trap handler (bare-metal, no neorv32 rte available)
  // configure trap handler (bare-metal, no neorv32 rte available)
  neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
  neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
 
 
 
#if (SPI_EN != 0)
  // setup SPI for 8-bit, clock-mode 0
  // setup SPI for 8-bit, clock-mode 0
  neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0);
  neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0);
 
#endif
 
 
#if (STATUS_LED_EN != 0)
#if (STATUS_LED_EN != 0)
  if (neorv32_gpio_available()) {
  if (neorv32_gpio_available()) {
    // activate status LED, clear all others
    // activate status LED, clear all others
    neorv32_gpio_port_set(1 << STATUS_LED_PIN);
    neorv32_gpio_port_set(1 << STATUS_LED_PIN);
Line 313... Line 349...
  PRINT_TEXT("\nCLK:  ");
  PRINT_TEXT("\nCLK:  ");
  PRINT_XNUM(SYSINFO_CLK);
  PRINT_XNUM(SYSINFO_CLK);
  PRINT_TEXT("\nMISA: ");
  PRINT_TEXT("\nMISA: ");
  PRINT_XNUM(neorv32_cpu_csr_read(CSR_MISA));
  PRINT_XNUM(neorv32_cpu_csr_read(CSR_MISA));
  PRINT_TEXT("\nZEXT: ");
  PRINT_TEXT("\nZEXT: ");
  PRINT_XNUM(neorv32_cpu_csr_read(CSR_MZEXT));
  PRINT_XNUM(SYSINFO_CPU);
  PRINT_TEXT("\nPROC: ");
  PRINT_TEXT("\nPROC: ");
  PRINT_XNUM(SYSINFO_FEATURES);
  PRINT_XNUM(SYSINFO_FEATURES);
  PRINT_TEXT("\nIMEM: ");
  PRINT_TEXT("\nIMEM: ");
  PRINT_XNUM(SYSINFO_IMEM_SIZE);
  PRINT_XNUM(SYSINFO_IMEM_SIZE);
  PRINT_TEXT(" bytes @");
  PRINT_TEXT(" bytes @");
Line 329... Line 365...
 
 
 
 
  // ------------------------------------------------
  // ------------------------------------------------
  // Auto boot sequence
  // Auto boot sequence
  // ------------------------------------------------
  // ------------------------------------------------
 
#if (SPI_EN != 0)
# if (AUTO_BOOT_TIMEOUT != 0)
# if (AUTO_BOOT_TIMEOUT != 0)
  if (neorv32_mtime_available()) {
  if (neorv32_mtime_available()) {
 
 
    PRINT_TEXT("\n\nAutoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press key to abort.\n");
    PRINT_TEXT("\n\nAutoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press key to abort.\n");
    uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTO_BOOT_TIMEOUT * SYSINFO_CLK);
    uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTO_BOOT_TIMEOUT * SYSINFO_CLK);
Line 356... Line 393...
    PRINT_TEXT("Aborted.\n\n");
    PRINT_TEXT("Aborted.\n\n");
  }
  }
#else
#else
  PRINT_TEXT("Aborted.\n\n");
  PRINT_TEXT("Aborted.\n\n");
#endif
#endif
 
#else
 
  PRINT_TEXT("\n\n");
 
#endif
 
 
  print_help();
  print_help();
 
 
 
 
  // ------------------------------------------------
  // ------------------------------------------------
Line 379... Line 419...
      print_help();
      print_help();
    }
    }
    else if (c == 'u') { // get executable via UART
    else if (c == 'u') { // get executable via UART
      get_exe(EXE_STREAM_UART);
      get_exe(EXE_STREAM_UART);
    }
    }
 
#if (SPI_EN != 0)
    else if (c == 's') { // program flash from memory (IMEM)
    else if (c == 's') { // program flash from memory (IMEM)
      save_exe();
      save_exe();
    }
    }
    else if (c == 'l') { // get executable from flash
    else if (c == 'l') { // get executable from flash
      get_exe(EXE_STREAM_FLASH);
      get_exe(EXE_STREAM_FLASH);
    }
    }
 
#endif
    else if (c == 'e') { // start application program  // executable available?
    else if (c == 'e') { // start application program  // executable available?
      if (exe_available == 0) {
      if (exe_available == 0) {
        PRINT_TEXT("No executable available.");
        PRINT_TEXT("No executable available.");
      }
      }
      else {
      else {
Line 411... Line 453...
 
 
  PRINT_TEXT("Available CMDs:\n"
  PRINT_TEXT("Available CMDs:\n"
                     " h: Help\n"
                     " h: Help\n"
                     " r: Restart\n"
                     " r: Restart\n"
                     " u: Upload\n"
                     " u: Upload\n"
 
#if (SPI_EN != 0)
                     " s: Store to flash\n"
                     " s: Store to flash\n"
                     " l: Load from flash\n"
                     " l: Load from flash\n"
 
#endif
                     " e: Execute");
                     " e: Execute");
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
Line 501... Line 545...
 
 
  // get image from flash?
  // get image from flash?
  if (src == EXE_STREAM_UART) {
  if (src == EXE_STREAM_UART) {
    PRINT_TEXT("Awaiting neorv32_exe.bin... ");
    PRINT_TEXT("Awaiting neorv32_exe.bin... ");
  }
  }
 
#if (SPI_EN != 0)
  else {
  else {
    PRINT_TEXT("Loading... ");
    PRINT_TEXT("Loading... ");
 
 
    // flash checks
    // flash checks
    if ((neorv32_spi_available() == 0) ||    // check if SPI is available at all
    if ((neorv32_spi_available() == 0) ||    // check if SPI is available at all
        (spi_flash_read_1st_id() == 0x00)) { // check if flash ready (or available at all)
        (spi_flash_read_1st_id() == 0x00)) { // check if flash ready (or available at all)
      system_error(ERROR_FLASH);
      system_error(ERROR_FLASH);
    }
    }
  }
  }
 
#endif
 
 
  // check if valid image
  // check if valid image
  uint32_t signature = get_exe_word(src, addr + EXE_OFFSET_SIGNATURE);
  uint32_t signature = get_exe_word(src, addr + EXE_OFFSET_SIGNATURE);
  if (signature != EXE_SIGNATURE) { // signature
  if (signature != EXE_SIGNATURE) { // signature
    system_error(ERROR_SIGNATURE);
    system_error(ERROR_SIGNATURE);
Line 551... Line 597...
/**********************************************************************//**
/**********************************************************************//**
 * Store content of instruction memory to SPI flash.
 * Store content of instruction memory to SPI flash.
 **************************************************************************/
 **************************************************************************/
void save_exe(void) {
void save_exe(void) {
 
 
 
#if (SPI_EN != 0)
  // size of last uploaded executable
  // size of last uploaded executable
  uint32_t size = exe_available;
  uint32_t size = exe_available;
 
 
  if (size == 0) {
  if (size == 0) {
    PRINT_TEXT("No executable available.");
    PRINT_TEXT("No executable available.");
Line 613... Line 660...
  // write checksum (sum complement)
  // write checksum (sum complement)
  checksum = (~checksum) + 1;
  checksum = (~checksum) + 1;
  spi_flash_write_word((uint32_t)SPI_BOOT_BASE_ADDR + EXE_OFFSET_CHECKSUM, checksum);
  spi_flash_write_word((uint32_t)SPI_BOOT_BASE_ADDR + EXE_OFFSET_CHECKSUM, checksum);
 
 
  PRINT_TEXT("OK");
  PRINT_TEXT("OK");
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Get word from executable stream
 * Get word from executable stream
Line 635... Line 683...
  uint32_t i;
  uint32_t i;
  for (i=0; i<4; i++) {
  for (i=0; i<4; i++) {
    if (src == EXE_STREAM_UART) {
    if (src == EXE_STREAM_UART) {
      data.uint8[i] = (uint8_t)PRINT_GETC();
      data.uint8[i] = (uint8_t)PRINT_GETC();
    }
    }
 
#if (SPI_EN != 0)
    else {
    else {
      data.uint8[i] = spi_flash_read_byte(addr + i);
      data.uint8[i] = spi_flash_read_byte(addr + i);
    }
    }
 
#endif
  }
  }
 
 
  return data.uint32;
  return data.uint32;
}
}
 
 
Line 699... Line 749...
 * @param[in] addr Flash read address.
 * @param[in] addr Flash read address.
 * @return Read byte from SPI flash.
 * @return Read byte from SPI flash.
 **************************************************************************/
 **************************************************************************/
uint8_t spi_flash_read_byte(uint32_t addr) {
uint8_t spi_flash_read_byte(uint32_t addr) {
 
 
 
#if (SPI_EN != 0)
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_cs_en(SPI_FLASH_CS);
 
 
  neorv32_spi_trans(SPI_FLASH_CMD_READ);
  neorv32_spi_trans(SPI_FLASH_CMD_READ);
  spi_flash_write_addr(addr);
  spi_flash_write_addr(addr);
  uint8_t rdata = (uint8_t)neorv32_spi_trans(0);
  uint8_t rdata = (uint8_t)neorv32_spi_trans(0);
 
 
  neorv32_spi_cs_dis(SPI_FLASH_CS);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
 
 
  return rdata;
  return rdata;
 
#else
 
  return 0;
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Write byte to SPI flash.
 * Write byte to SPI flash.
Line 719... Line 773...
 * @param[in] addr SPI flash read address.
 * @param[in] addr SPI flash read address.
 * @param[in] wdata SPI flash read data.
 * @param[in] wdata SPI flash read data.
 **************************************************************************/
 **************************************************************************/
void spi_flash_write_byte(uint32_t addr, uint8_t wdata) {
void spi_flash_write_byte(uint32_t addr, uint8_t wdata) {
 
 
 
#if (SPI_EN != 0)
  spi_flash_write_enable(); // allow write-access
  spi_flash_write_enable(); // allow write-access
 
 
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_cs_en(SPI_FLASH_CS);
 
 
  neorv32_spi_trans(SPI_FLASH_CMD_PAGE_PROGRAM);
  neorv32_spi_trans(SPI_FLASH_CMD_PAGE_PROGRAM);
Line 730... Line 785...
  neorv32_spi_trans(wdata);
  neorv32_spi_trans(wdata);
 
 
  neorv32_spi_cs_dis(SPI_FLASH_CS);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
 
 
  spi_flash_write_wait(); // wait for write operation to finish
  spi_flash_write_wait(); // wait for write operation to finish
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Write word to SPI flash.
 * Write word to SPI flash.
Line 741... Line 797...
 * @param addr SPI flash write address.
 * @param addr SPI flash write address.
 * @param wdata SPI flash write data.
 * @param wdata SPI flash write data.
 **************************************************************************/
 **************************************************************************/
void spi_flash_write_word(uint32_t addr, uint32_t wdata) {
void spi_flash_write_word(uint32_t addr, uint32_t wdata) {
 
 
 
#if (SPI_EN != 0)
  union {
  union {
    uint32_t uint32;
    uint32_t uint32;
    uint8_t  uint8[sizeof(uint32_t)];
    uint8_t  uint8[sizeof(uint32_t)];
  } data;
  } data;
 
 
Line 752... Line 809...
 
 
  int i;
  int i;
  for (i=0; i<4; i++) {
  for (i=0; i<4; i++) {
    spi_flash_write_byte(addr + i, data.uint8[i]);
    spi_flash_write_byte(addr + i, data.uint8[i]);
  }
  }
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Erase sector (64kB) at base adress.
 * Erase sector (64kB) at base adress.
 *
 *
 * @param[in] addr Base address of sector to erase.
 * @param[in] addr Base address of sector to erase.
 **************************************************************************/
 **************************************************************************/
void spi_flash_erase_sector(uint32_t addr) {
void spi_flash_erase_sector(uint32_t addr) {
 
 
 
#if (SPI_EN != 0)
  spi_flash_write_enable(); // allow write-access
  spi_flash_write_enable(); // allow write-access
 
 
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_cs_en(SPI_FLASH_CS);
 
 
  neorv32_spi_trans(SPI_FLASH_CMD_SECTOR_ERASE);
  neorv32_spi_trans(SPI_FLASH_CMD_SECTOR_ERASE);
  spi_flash_write_addr(addr);
  spi_flash_write_addr(addr);
 
 
  neorv32_spi_cs_dis(SPI_FLASH_CS);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
 
 
  spi_flash_write_wait(); // wait for write operation to finish
  spi_flash_write_wait(); // wait for write operation to finish
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Read first byte of ID (manufacturer ID), should be != 0x00.
 * Read first byte of ID (manufacturer ID), should be != 0x00.
Line 784... Line 844...
 *
 *
 * @return First byte of ID.
 * @return First byte of ID.
 **************************************************************************/
 **************************************************************************/
uint8_t spi_flash_read_1st_id(void) {
uint8_t spi_flash_read_1st_id(void) {
 
 
 
#if (SPI_EN != 0)
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_cs_en(SPI_FLASH_CS);
 
 
  neorv32_spi_trans(SPI_FLASH_CMD_READ_ID);
  neorv32_spi_trans(SPI_FLASH_CMD_READ_ID);
  uint8_t id = (uint8_t)neorv32_spi_trans(0);
  uint8_t id = (uint8_t)neorv32_spi_trans(0);
 
 
  neorv32_spi_cs_dis(SPI_FLASH_CS);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
 
 
  return id;
  return id;
 
#else
 
  return 0;
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Wait for flash write operation to finisch.
 * Wait for flash write operation to finish.
 **************************************************************************/
 **************************************************************************/
void spi_flash_write_wait(void) {
void spi_flash_write_wait(void) {
 
 
 
#if (SPI_EN != 0)
  while(1) {
  while(1) {
 
 
    neorv32_spi_cs_en(SPI_FLASH_CS);
    neorv32_spi_cs_en(SPI_FLASH_CS);
 
 
    neorv32_spi_trans(SPI_FLASH_CMD_READ_STATUS);
    neorv32_spi_trans(SPI_FLASH_CMD_READ_STATUS);
Line 813... Line 878...
 
 
    if ((status & 0x01) == 0) { // write in progress flag cleared?
    if ((status & 0x01) == 0) { // write in progress flag cleared?
      break;
      break;
    }
    }
  }
  }
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Enable flash write access.
 * Enable flash write access.
 **************************************************************************/
 **************************************************************************/
void spi_flash_write_enable(void) {
void spi_flash_write_enable(void) {
 
 
 
#if (SPI_EN != 0)
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_cs_en(SPI_FLASH_CS);
  neorv32_spi_trans(SPI_FLASH_CMD_WRITE_ENABLE);
  neorv32_spi_trans(SPI_FLASH_CMD_WRITE_ENABLE);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
  neorv32_spi_cs_dis(SPI_FLASH_CS);
 
#endif
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Send address word to flash.
 * Send address word to flash.
 *
 *
 * @param[in] addr Address word.
 * @param[in] addr Address word.
 **************************************************************************/
 **************************************************************************/
void spi_flash_write_addr(uint32_t addr) {
void spi_flash_write_addr(uint32_t addr) {
 
 
 
#if (SPI_EN != 0)
  union {
  union {
    uint32_t uint32;
    uint32_t uint32;
    uint8_t  uint8[sizeof(uint32_t)];
    uint8_t  uint8[sizeof(uint32_t)];
  } address;
  } address;
 
 
Line 845... Line 914...
 
 
  int i;
  int i;
  for (i=2; i>=0; i--) {
  for (i=2; i>=0; i--) {
    neorv32_spi_trans(address.uint8[i]);
    neorv32_spi_trans(address.uint8[i]);
  }
  }
 
#endif
}
}
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.