| Line 111... |
Line 111... |
/** SPI flash sector size in bytes */
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/** SPI flash sector size in bytes */
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#ifndef SPI_FLASH_SECTOR_SIZE
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#ifndef SPI_FLASH_SECTOR_SIZE
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#define SPI_FLASH_SECTOR_SIZE 65536 // default = 64kB
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#define SPI_FLASH_SECTOR_SIZE 65536 // default = 64kB
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#endif
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#endif
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/** SPI flash clock pre-scaler; see #NEORV32_TWI_CT_enum */
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/** SPI flash clock pre-scaler; see #NEORV32_SPI_CTRL_enum */
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#ifndef SPI_FLASH_CLK_PRSC
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#ifndef SPI_FLASH_CLK_PRSC
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#define SPI_FLASH_CLK_PRSC CLK_PRSC_8
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#define SPI_FLASH_CLK_PRSC CLK_PRSC_8
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#endif
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#endif
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/** SPI flash boot base address */
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/** SPI flash boot base address */
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| Line 331... |
Line 331... |
neorv32_uart0_setup(UART_BAUD, PARITY_NONE, FLOW_CONTROL_NONE);
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neorv32_uart0_setup(UART_BAUD, PARITY_NONE, FLOW_CONTROL_NONE);
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#endif
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#endif
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// Configure machine system timer interrupt for ~2Hz
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// Configure machine system timer interrupt for ~2Hz
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if (neorv32_mtime_available()) {
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if (neorv32_mtime_available()) {
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (NEORV32_SYSINFO.CLK/4));
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// active timer IRQ
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// active timer IRQ
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source only!
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source only!
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neorv32_cpu_eint(); // enable global interrupts
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neorv32_cpu_eint(); // enable global interrupts
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}
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}
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| Line 345... |
Line 345... |
// ------------------------------------------------
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// ------------------------------------------------
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PRINT_TEXT("\n\n\n<< NEORV32 Bootloader >>\n\n"
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PRINT_TEXT("\n\n\n<< NEORV32 Bootloader >>\n\n"
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"BLDV: "__DATE__"\nHWV: ");
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"BLDV: "__DATE__"\nHWV: ");
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MIMPID));
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MIMPID));
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PRINT_TEXT("\nCLK: ");
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PRINT_TEXT("\nCLK: ");
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PRINT_XNUM(SYSINFO_CLK);
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PRINT_XNUM(NEORV32_SYSINFO.CLK);
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PRINT_TEXT("\nMISA: ");
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PRINT_TEXT("\nMISA: ");
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MISA));
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MISA));
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PRINT_TEXT("\nZEXT: ");
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PRINT_TEXT("\nCPU: ");
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PRINT_XNUM(SYSINFO_CPU);
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PRINT_XNUM(NEORV32_SYSINFO.CPU);
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PRINT_TEXT("\nPROC: ");
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PRINT_TEXT("\nSOC: ");
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PRINT_XNUM(SYSINFO_FEATURES);
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PRINT_XNUM(NEORV32_SYSINFO.SOC);
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PRINT_TEXT("\nIMEM: ");
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PRINT_TEXT("\nIMEM: ");
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PRINT_XNUM(SYSINFO_IMEM_SIZE);
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PRINT_XNUM(NEORV32_SYSINFO.IMEM_SIZE);
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PRINT_TEXT(" bytes @");
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PRINT_TEXT(" bytes @");
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PRINT_XNUM(SYSINFO_ISPACE_BASE);
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PRINT_XNUM(NEORV32_SYSINFO.ISPACE_BASE);
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PRINT_TEXT("\nDMEM: ");
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PRINT_TEXT("\nDMEM: ");
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PRINT_XNUM(SYSINFO_DMEM_SIZE);
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PRINT_XNUM(NEORV32_SYSINFO.DMEM_SIZE);
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PRINT_TEXT(" bytes @");
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PRINT_TEXT(" bytes @");
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PRINT_XNUM(SYSINFO_DSPACE_BASE);
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PRINT_XNUM(NEORV32_SYSINFO.DSPACE_BASE);
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// ------------------------------------------------
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// ------------------------------------------------
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// Auto boot sequence
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// Auto boot sequence
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// ------------------------------------------------
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// ------------------------------------------------
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#if (SPI_EN != 0)
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#if (SPI_EN != 0)
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#if (AUTO_BOOT_TIMEOUT != 0)
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#if (AUTO_BOOT_TIMEOUT != 0)
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if (neorv32_mtime_available()) {
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if (neorv32_mtime_available()) {
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|
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PRINT_TEXT("\n\nAutoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press key to abort.\n");
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PRINT_TEXT("\n\nAutoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press key to abort.\n");
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uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTO_BOOT_TIMEOUT * SYSINFO_CLK);
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uint64_t timeout_time = neorv32_mtime_get_time() + (uint64_t)(AUTO_BOOT_TIMEOUT * NEORV32_SYSINFO.CLK);
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|
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while(1){
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while(1){
|
|
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if (neorv32_uart0_available()) { // wait for any key to be pressed
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if (neorv32_uart0_available()) { // wait for any key to be pressed
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if (neorv32_uart0_char_received()) {
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if (neorv32_uart0_char_received()) {
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| Line 475... |
Line 475... |
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// wait for UART to finish transmitting
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// wait for UART to finish transmitting
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while (neorv32_uart0_tx_busy());
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while (neorv32_uart0_tx_busy());
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|
|
// start app at instruction space base address
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// start app at instruction space base address
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register uint32_t app_base = SYSINFO_ISPACE_BASE;
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register uint32_t app_base = NEORV32_SYSINFO.ISPACE_BASE;
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asm volatile ("jalr zero, %0" : : "r" (app_base));
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asm volatile ("jalr zero, %0" : : "r" (app_base));
|
while (1);
|
while (1);
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}
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}
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|
|
|
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| Line 501... |
Line 501... |
neorv32_gpio_pin_toggle(STATUS_LED_PIN); // toggle status LED
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neorv32_gpio_pin_toggle(STATUS_LED_PIN); // toggle status LED
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}
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}
|
#endif
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#endif
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// set time for next IRQ
|
// set time for next IRQ
|
if (neorv32_mtime_available()) {
|
if (neorv32_mtime_available()) {
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (SYSINFO_CLK/4));
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (NEORV32_SYSINFO.CLK/4));
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}
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}
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}
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}
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|
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// Bus store access error during get_exe
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// Bus store access error during get_exe
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else if ((cause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
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else if ((cause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
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| Line 568... |
Line 568... |
// image size and checksum
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// image size and checksum
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uint32_t size = get_exe_word(src, addr + EXE_OFFSET_SIZE); // size in bytes
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uint32_t size = get_exe_word(src, addr + EXE_OFFSET_SIZE); // size in bytes
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uint32_t check = get_exe_word(src, addr + EXE_OFFSET_CHECKSUM); // complement sum checksum
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uint32_t check = get_exe_word(src, addr + EXE_OFFSET_CHECKSUM); // complement sum checksum
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|
|
// transfer program data
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// transfer program data
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uint32_t *pnt = (uint32_t*)SYSINFO_ISPACE_BASE;
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uint32_t *pnt = (uint32_t*)NEORV32_SYSINFO.ISPACE_BASE;
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uint32_t checksum = 0;
|
uint32_t checksum = 0;
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uint32_t d = 0, i = 0;
|
uint32_t d = 0, i = 0;
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addr = addr + EXE_OFFSET_DATA;
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addr = addr + EXE_OFFSET_DATA;
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while (i < (size/4)) { // in words
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while (i < (size/4)) { // in words
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d = get_exe_word(src, addr);
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d = get_exe_word(src, addr);
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| Line 644... |
Line 644... |
// write size
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// write size
|
spi_flash_write_word(addr + EXE_OFFSET_SIZE, size);
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spi_flash_write_word(addr + EXE_OFFSET_SIZE, size);
|
|
|
// store data from instruction memory and update checksum
|
// store data from instruction memory and update checksum
|
uint32_t checksum = 0;
|
uint32_t checksum = 0;
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uint32_t *pnt = (uint32_t*)SYSINFO_ISPACE_BASE;
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uint32_t *pnt = (uint32_t*)NEORV32_SYSINFO.ISPACE_BASE;
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addr = addr + EXE_OFFSET_DATA;
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addr = addr + EXE_OFFSET_DATA;
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uint32_t i = 0;
|
uint32_t i = 0;
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while (i < (size/4)) { // in words
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while (i < (size/4)) { // in words
|
uint32_t d = (uint32_t)*pnt++;
|
uint32_t d = (uint32_t)*pnt++;
|
checksum += d;
|
checksum += d;
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