| Line 39... |
Line 39... |
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// IO region
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// IO region
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.equ IO_BEGIN, 0xFFFFFF80 // start of processor-internal IO region
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.equ IO_BEGIN, 0xFFFFFF80 // start of processor-internal IO region
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// SYSINFO
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.equ SYSINFO_DSPACE_BASE, 0xFFFFFFF4
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.equ SYSINFO_DSPACE_SIZE, 0xFFFFFFFC
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_start:
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_start:
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.cfi_startproc
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.cfi_startproc
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.cfi_undefined ra
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.cfi_undefined ra
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| Line 66... |
Line 62... |
addi x8, x0, 0
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addi x8, x0, 0
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addi x9, x0, 0
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addi x9, x0, 0
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//addi x10, x0, 0
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//addi x10, x0, 0
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//addi x11, x0, 0
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//addi x11, x0, 0
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//addi x12, x0, 0
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//addi x12, x0, 0
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addi x13, x0, 0
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//addi x13, x0, 0
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addi x14, x0, 0
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addi x14, x0, 0
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addi x15, x0, 0
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addi x15, x0, 0
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// *********************************************************
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// *********************************************************
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// Setup stack pointer
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// No interrupts, thanks
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// *********************************************************
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// *********************************************************
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__crt0_stack_pointer_init:
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__crt0_status_init:
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lw x11, SYSINFO_DSPACE_BASE(zero) // data memory space base address
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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lw x12, SYSINFO_DSPACE_SIZE(zero) // data memory space size
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csrrw zero, mstatus, x10
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add sp, x11, x12
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csrrw zero, mie, zero // clear mie
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addi sp, sp, -4 // stack pointer = last entry
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addi fp, sp, 0 // frame pointer = stack pointer
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// *********************************************************
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// *********************************************************
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// Setup global pointer
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// Setup pointers using linker script symbol
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// *********************************************************
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// *********************************************************
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__crt0_global_pointer_init:
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__crt0_pointer_init:
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.option push
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.option push
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.option norelax
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.option norelax
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la gp, __global_pointer$
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la sp, __crt0_stack_begin
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andi sp, sp, 0xfffffffc // make sure this is aligned
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addi fp, sp, 0 // frame pointer = stack pointer
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la gp, __global_pointer$ // global pointer
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.option pop
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.option pop
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// *********************************************************
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// *********************************************************
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// Init trap handler base address
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// Init trap handler base address
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| Line 115... |
Line 112... |
addi x11, x11, 4
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addi x11, x11, 4
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bne zero, x11, __crt0_reset_io_loop
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bne zero, x11, __crt0_reset_io_loop
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// *********************************************************
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// *********************************************************
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// Clear .bss section (byte-wise)
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// Clear .bss section (byte-wise) using linker script symbols
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// *********************************************************
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// *********************************************************
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__crt0_clear_bss:
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__crt0_clear_bss:
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la x11, __crt0_bss_start
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la x11, __crt0_bss_start
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la x12, __crt0_bss_end
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la x12, __crt0_bss_end
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| Line 131... |
Line 128... |
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__crt0_clear_bss_loop_end:
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__crt0_clear_bss_loop_end:
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// *********************************************************
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// *********************************************************
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// Copy initialized .data section from ROM to RAM (byte-wise)
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// Copy initialized .data section from ROM to RAM (byte-wise) using linker script symbols
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// *********************************************************
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// *********************************************************
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__crt0_copy_data:
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__crt0_copy_data:
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la x11, __crt0_copy_data_src_begin // start of data area (copy source)
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la x11, __crt0_copy_data_src_begin // start of data area (copy source)
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la x12, __crt0_copy_data_dst_begin // start of data area (copy destination)
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la x12, __crt0_copy_data_dst_begin // start of data area (copy destination)
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la x13, __crt0_copy_data_dst_end // last address of destination data area
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la x13, __crt0_copy_data_dst_end // last address of destination data area
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| Line 187... |
Line 184... |
blt x8, zero, __crt0_dummy_trap_handler_irq // skip mepc modification if interrupt
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blt x8, zero, __crt0_dummy_trap_handler_irq // skip mepc modification if interrupt
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csrr x8, mepc
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csrr x8, mepc
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// is compressed instruction?
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// is compressed instruction?
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__crt0_dummy_trap_handler_exc_c_check:
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lh x9, 0(x8) // get compressed instruction or lower 16 bits of uncompressed instruction that caused exception
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lh x9, 0(x8) // get compressed instruction or lower 16 bits of uncompressed instruction that caused exception
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andi x9, x9, 3 // mask: isolate lowest 2 opcode bits (= 11 for uncompressed instructions)
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andi x9, x9, 3 // mask: isolate lowest 2 opcode bits (= 11 for uncompressed instructions)
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addi x8, x8, +2 // only this for compressed instructions
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addi x8, x8, +2 // only this for compressed instructions
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csrw mepc, x8 // set return address when compressed instruction
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csrw mepc, x8 // set return address when compressed instruction
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addi x8, zero, 3
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addi x8, zero, 3
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bne x8, x9, __crt0_dummy_trap_handler_irq // jump if compressed instruction
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bne x8, x9, __crt0_dummy_trap_handler_irq // jump if compressed instruction
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// is uncompressed instruction
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// is uncompressed instruction
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__crt0_dummy_trap_handler_exc_uncrompressed:
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csrr x8, mepc
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csrr x8, mepc
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addi x8, x8, +2 // add another 2 (making +4) for uncompressed instructions
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addi x8, x8, +2 // add another 2 (making +4) for uncompressed instructions
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csrw mepc, x8
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csrw mepc, x8
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__crt0_dummy_trap_handler_irq:
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__crt0_dummy_trap_handler_irq:
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