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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [sw/] [common/] [crt0.S] - Diff between revs 23 and 32
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Rev 23 |
Rev 32 |
Line 45... |
Line 45... |
_start:
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_start:
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.cfi_startproc
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.cfi_startproc
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.cfi_undefined ra
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.cfi_undefined ra
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// *********************************************************
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// *********************************************************
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// Clear register file
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// Clear register file (lower half, assume E extension)
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// Assume 'worst case': rv32e
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// *********************************************************
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// *********************************************************
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__crt0_reg_file_clear:
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__crt0_reg_file_clear:
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//addi x0, x0, 0 // hardwired to zero
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//addi x0, x0, 0 // hardwired to zero
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addi x1, x0, 0
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addi x1, x0, 0
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addi x2, x0, 0
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addi x2, x0, 0
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Line 68... |
Line 67... |
addi x14, x0, 0
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addi x14, x0, 0
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addi x15, x0, 0
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addi x15, x0, 0
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// *********************************************************
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// *********************************************************
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// Clear register file (upper half, if no E extension)
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// *********************************************************
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#ifndef __riscv_32e
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// save some program space if compiling bootloader
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#ifndef make_bootloader
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addi x16, x0, 0
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addi x17, x0, 0
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addi x18, x0, 0
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addi x19, x0, 0
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addi x20, x0, 0
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addi x21, x0, 0
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addi x22, x0, 0
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addi x23, x0, 0
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addi x24, x0, 0
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addi x25, x0, 0
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addi x26, x0, 0
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addi x27, x0, 0
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addi x28, x0, 0
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addi x29, x0, 0
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addi x30, x0, 0
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addi x31, x0, 0
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#endif
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#endif
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// *********************************************************
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// No interrupts, thanks
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// No interrupts, thanks
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// *********************************************************
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// *********************************************************
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__crt0_status_init:
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__crt0_status_init:
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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li x10, 0x00001800 // clear mstatus and set mpp(1:0)
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csrrw zero, mstatus, x10
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csrrw zero, mstatus, x10
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